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Searched refs:regs_IX_OR_IY (Results 1 – 8 of 8) sorted by relevance

/dports/lang/sdcc/sdcc-4.0.0/sim/ucsim/z80.src/
H A Dinst_xd.cc42 regs_IX_OR_IY = fetch2(); in inst_Xd_ld()
46 store2(tw, regs_IX_OR_IY); in inst_Xd_ld()
54 regs_IX_OR_IY = get2(tw); in inst_Xd_ld()
192 regs.SP = regs_IX_OR_IY; in inst_Xd_ld()
209 add_IX_Word(regs_IX_OR_IY); in inst_Xd_add()
238 push2(regs_IX_OR_IY); in inst_Xd_push()
250 ++regs_IX_OR_IY; in inst_Xd_inc()
285 --regs_IX_OR_IY; in inst_Xd_dec()
544 tempw = regs_IX_OR_IY; in inst_Xd()
553 push2(regs_IX_OR_IY); in inst_Xd()
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H A Dinst_r2k.cc503 if (*regs_IX_OR_IY) in inst_xd()
504 *regs_IX_OR_IY = 1; in inst_xd()
509 if (*regs_IX_OR_IY == 0) in inst_xd()
529 tempw = *regs_IX_OR_IY; in inst_xd()
546 push2(*regs_IX_OR_IY); in inst_xd()
551 PC = *regs_IX_OR_IY; in inst_xd()
556 PC = *regs_IX_OR_IY; in inst_xd()
563 *regs_IX_OR_IY &= regs.DE; in inst_xd()
565 *regs_IX_OR_IY |= regs.DE; in inst_xd()
571 if (regs_IX_OR_IY == 0) in inst_xd()
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H A Dinst_xxcb.cc42 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_rlc()
86 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_rrc()
130 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_rl()
174 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_rr()
218 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_sla()
262 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_sra()
306 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_slia()
350 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_srl()
398 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_bit()
417 addr = add_u16_disp(regs_IX_OR_IY, n_offset); in inst_XXcb_res()
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H A Dinst_fdcb.cc36 #define regs_IX_OR_IY regs.IY macro
H A Dinst_ddcb.cc37 #define regs_IX_OR_IY regs.IX macro
H A Dinst_fd.cc40 #define regs_IX_OR_IY regs.IY macro
H A Dinst_dd.cc40 #define regs_IX_OR_IY regs.IX macro
H A Dz80mac.h74 unsigned int accu = (unsigned int)regs_IX_OR_IY; \
80 regs_IX_OR_IY += oper; \