| /dports/databases/tiledb/TileDB-2.5.2/test/src/ |
| H A D | unit-filter-buffer.cc | 92 fbuf.reset_offset();
110 fbuf.reset_offset();
115 fbuf.reset_offset();
120 fbuf.reset_offset();
124 fbuf.reset_offset();
131 fbuf.reset_offset();
136 fbuf.reset_offset();
143 fbuf.reset_offset();
148 fbuf.reset_offset();
171 fbuf.reset_offset();
[all …]
|
| H A D | unit-crypto.cc | 80 decrypted.reset_offset();
87 decrypted.reset_offset();
99 decrypted.reset_offset();
106 decrypted.reset_offset();
116 decrypted.reset_offset();
124 decrypted.reset_offset();
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/allwinner/common/ |
| H A D | sunxi_common.c | 105 unsigned int reset_offset = 0xb0; in sunxi_init_platform_r_twi() local
118 reset_offset = use_rsb ? 0x1bc : 0x19c; in sunxi_init_platform_r_twi()
146 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()
149 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
150 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/allwinner/common/ |
| H A D | sunxi_common.c | 105 unsigned int reset_offset = 0xb0; in sunxi_init_platform_r_twi() local
118 reset_offset = use_rsb ? 0x1bc : 0x19c; in sunxi_init_platform_r_twi()
146 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()
149 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
150 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/allwinner/common/ |
| H A D | sunxi_common.c | 105 unsigned int reset_offset = 0xb0; in sunxi_init_platform_r_twi() local
118 reset_offset = use_rsb ? 0x1bc : 0x19c; in sunxi_init_platform_r_twi()
146 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()
149 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
150 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/allwinner/common/ |
| H A D | sunxi_common.c | 105 unsigned int reset_offset = 0xb0; in sunxi_init_platform_r_twi() local
118 reset_offset = use_rsb ? 0x1bc : 0x19c; in sunxi_init_platform_r_twi()
146 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()
149 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
150 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/allwinner/common/ |
| H A D | sunxi_common.c | 105 unsigned int reset_offset = 0xb0; in sunxi_init_platform_r_twi() local
118 reset_offset = use_rsb ? 0x1bc : 0x19c; in sunxi_init_platform_r_twi()
146 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()
149 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
150 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
|
| /dports/databases/tiledb/TileDB-2.5.2/tiledb/sm/filter/ |
| H A D | filter_buffer.cc | 157 src->reset_offset(); in copy_to()
213 b->reset_offset(); in buffer_ptr()
392 void FilterBuffer::reset_offset() { in reset_offset() function in tiledb::sm::FilterBuffer
400 reset_offset(); in set_offset()
450 buf_ptr->reset_offset(); in prepend_buffer()
475 reset_offset(); in prepend_buffer()
516 buf->reset_offset(); in append_view()
537 reset_offset(); in append_view()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/reset/ |
| H A D | sti-reset.c | 38 int reset_offset; member
69 .reset_offset = _rr, \
76 .reset_offset = _rr, \
257 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/reset/ |
| H A D | sti-reset.c | 38 int reset_offset; member
69 .reset_offset = _rr, \
76 .reset_offset = _rr, \
257 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/reset/ |
| H A D | sti-reset.c | 42 int reset_offset; member
73 .reset_offset = _rr, \
80 .reset_offset = _rr, \
261 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
|