Searched refs:rtr_sid (Results 1 – 4 of 4) sorted by relevance
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/sim/io_port2/pcie_dma_ctrl/ |
| H A D | pcie_dma_ctrl_tb.v | 47 reg [7:0] rtr_sid = 4; register
88 .stream_err(error), .rtr_sid(rtr_sid), .rtr_dst(rtr_dst)
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/io_port2/ |
| H A D | pcie_dma_ctrl_tb.v | 47 reg [7:0] rtr_sid = 4; register
88 .stream_err(error), .rtr_sid(rtr_sid), .rtr_dst(rtr_dst)
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| H A D | pcie_dma_ctrl.v | 50 input [ROUTER_SID_W-1:0] rtr_sid, port
149 .local_sid(rtr_sid), .fifo_dst(rtr_dst)
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
| H A D | x300_pcie_int.v | 226 .stream_busy(dmatx_busy), .stream_err(dmatx_error), .rtr_sid(8'h00), .rtr_dst()
238 .stream_busy(dmarx_busy), .stream_err(dmarx_error), .rtr_sid(8'h00), .rtr_dst()
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