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Searched refs:rtt_wr (Results 1 – 25 of 2138) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c320 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
323 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
325 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
327 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
330 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c320 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
323 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
325 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
327 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
330 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c320 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
323 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
325 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
327 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
330 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c320 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
323 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
325 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
327 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
330 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c338 unsigned int rtt_wr = MV_DDR_RTT_WR_RZQ_LAST; in mv_ddr_rtt_wr_get() local
341 rtt_wr = tm->edata.mem_edata.rtt_wr[cs_num - 1]; in mv_ddr_rtt_wr_get()
343 if (rtt_wr >= MV_DDR_RTT_WR_RZQ_LAST) { in mv_ddr_rtt_wr_get()
345 rtt_wr = PARAM_UNDEFINED; in mv_ddr_rtt_wr_get()
348 return rtt_wr; in mv_ddr_rtt_wr_get()

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