| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
272 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
280 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
290 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
293 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
294 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
551 tcg_gen_discard_i32(dc->sar_m32); in gen_wsr_sar()
2266 tcg_gen_shl_i32(cpu_R[arg[0]], cpu_R[arg[1]], dc->sar_m32); in translate_sll()
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
265 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
273 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
283 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
286 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
287 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2410 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2736 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
265 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
273 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
283 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
286 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
287 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2401 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2728 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu42/qemu-4.2.1/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
265 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
273 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
283 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
286 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
287 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2410 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2736 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
265 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
273 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
283 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
286 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
287 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2410 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2737 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu5/qemu-5.2.0/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
294 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
302 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
312 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
315 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
316 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2479 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2810 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/xtensa/ |
| H A D | translate.c | 61 TCGv_i32 sar_m32; member
293 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
301 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
311 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
314 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
315 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2451 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2782 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu/qemu-6.2.0/target/xtensa/ |
| H A D | translate.c | 61 TCGv_i32 sar_m32; member
293 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
301 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
311 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
314 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
315 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2442 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2773 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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| /dports/emulators/qemu60/qemu-6.0.0/target/xtensa/ |
| H A D | translate.c | 62 TCGv_i32 sar_m32; member
294 tcg_temp_free(dc->sar_m32); in reset_sar_tracker()
302 tcg_gen_discard_i32(dc->sar_m32); in gen_right_shift_sar()
312 dc->sar_m32 = tcg_temp_local_new_i32(); in gen_left_shift_sar()
315 tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); in gen_left_shift_sar()
316 tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); in gen_left_shift_sar()
2479 tcg_gen_shl_i32(arg[0].out, arg[1].in, dc->sar_m32); in translate_sll()
2810 tcg_gen_discard_i32(dc->sar_m32); in translate_wsr_sar()
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