| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 744 &data->dpm_table.sclk_table, in smu7_reset_dpm_tables()
807 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
901 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v1()
904 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
4015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4029 if (i >= sclk_table->count) { in smu7_find_dpm_states_clocks_in_dpm_table()
4893 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_print_clock_levels() local
5015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_sclk_od() local
5018 int value = sclk_table->dpm_levels[sclk_table->count - 1].value; in smu7_get_sclk_od()
5342 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_max_high_clocks() local
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| H A D | process_pptables_v1_0.c | 407 phm_ppt_v1_clock_voltage_dependency_table *sclk_table; in get_sclk_voltage_dependency_table() local
418 sclk_table = kzalloc(struct_size(sclk_table, entries, tonga_table->ucNumEntries), in get_sclk_voltage_dependency_table()
420 if (!sclk_table) in get_sclk_voltage_dependency_table()
423 sclk_table->count = (uint32_t)tonga_table->ucNumEntries; in get_sclk_voltage_dependency_table()
431 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
447 sclk_table = kzalloc(struct_size(sclk_table, entries, polaris_table->ucNumEntries), in get_sclk_voltage_dependency_table()
449 if (!sclk_table) in get_sclk_voltage_dependency_table()
452 sclk_table->count = (uint32_t)polaris_table->ucNumEntries; in get_sclk_voltage_dependency_table()
460 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
470 *pp_tonga_sclk_dep_table = sclk_table; in get_sclk_voltage_dependency_table()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 744 &data->dpm_table.sclk_table, in smu7_reset_dpm_tables()
807 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
901 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v1()
904 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
4015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4029 if (i >= sclk_table->count) { in smu7_find_dpm_states_clocks_in_dpm_table()
4893 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_print_clock_levels() local
5015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_sclk_od() local
5018 int value = sclk_table->dpm_levels[sclk_table->count - 1].value; in smu7_get_sclk_od()
5342 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_max_high_clocks() local
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| H A D | process_pptables_v1_0.c | 407 phm_ppt_v1_clock_voltage_dependency_table *sclk_table; in get_sclk_voltage_dependency_table() local
418 sclk_table = kzalloc(struct_size(sclk_table, entries, tonga_table->ucNumEntries), in get_sclk_voltage_dependency_table()
420 if (!sclk_table) in get_sclk_voltage_dependency_table()
423 sclk_table->count = (uint32_t)tonga_table->ucNumEntries; in get_sclk_voltage_dependency_table()
431 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
447 sclk_table = kzalloc(struct_size(sclk_table, entries, polaris_table->ucNumEntries), in get_sclk_voltage_dependency_table()
449 if (!sclk_table) in get_sclk_voltage_dependency_table()
452 sclk_table->count = (uint32_t)polaris_table->ucNumEntries; in get_sclk_voltage_dependency_table()
460 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
470 *pp_tonga_sclk_dep_table = sclk_table; in get_sclk_voltage_dependency_table()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 744 &data->dpm_table.sclk_table, in smu7_reset_dpm_tables()
807 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
901 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v1()
904 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
4015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4029 if (i >= sclk_table->count) { in smu7_find_dpm_states_clocks_in_dpm_table()
4893 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_print_clock_levels() local
5015 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_sclk_od() local
5018 int value = sclk_table->dpm_levels[sclk_table->count - 1].value; in smu7_get_sclk_od()
5342 struct smu7_single_dpm_table *sclk_table = &(data->dpm_table.sclk_table); in smu7_get_max_high_clocks() local
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| H A D | process_pptables_v1_0.c | 407 phm_ppt_v1_clock_voltage_dependency_table *sclk_table; in get_sclk_voltage_dependency_table() local
418 sclk_table = kzalloc(struct_size(sclk_table, entries, tonga_table->ucNumEntries), in get_sclk_voltage_dependency_table()
420 if (!sclk_table) in get_sclk_voltage_dependency_table()
423 sclk_table->count = (uint32_t)tonga_table->ucNumEntries; in get_sclk_voltage_dependency_table()
431 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
447 sclk_table = kzalloc(struct_size(sclk_table, entries, polaris_table->ucNumEntries), in get_sclk_voltage_dependency_table()
449 if (!sclk_table) in get_sclk_voltage_dependency_table()
452 sclk_table->count = (uint32_t)polaris_table->ucNumEntries; in get_sclk_voltage_dependency_table()
460 entries, sclk_table, i); in get_sclk_voltage_dependency_table()
470 *pp_tonga_sclk_dep_table = sclk_table; in get_sclk_voltage_dependency_table()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | vegam_smumgr.c | 889 for (i = 0; i < dpm_table->sclk_table.count; i++) { in vegam_populate_all_graphic_levels()
892 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels()
910 (uint8_t)dpm_table->sclk_table.count; in vegam_populate_all_graphic_levels()
914 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
923 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
948 for (i = 2; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
1291 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in vegam_program_memory_timing_parameters()
1510 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_clock_stretcher_data_table()
1512 sclk_table->entries[i].cks_enable << i; in vegam_populate_clock_stretcher_data_table()
1629 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_avfs_parameters()
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| H A D | polaris10_smumgr.c | 1067 for (i = 0; i < dpm_table->sclk_table.count; i++) { in polaris10_populate_all_graphic_levels()
1070 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels()
1084 dpm_table->sclk_table.dpm_levels[0].value, in polaris10_populate_all_graphic_levels()
1098 (uint8_t)dpm_table->sclk_table.count; in polaris10_populate_all_graphic_levels()
1111 for (i = 0; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1136 for (i = 2; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1498 for (i = 0; i < hw_data->dpm_table.sclk_table.count; i++) { in polaris10_program_memory_timing_parameters()
1501 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters()
1587 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in polaris10_populate_smc_boot_level()
1671 for (i = 0; i < sclk_table->count; i++) { in polaris10_populate_clock_stretcher_data_table()
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| H A D | tonga_smumgr.c | 710 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
712 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels()
726 if (dpm_table->sclk_table.count > 1) in tonga_populate_all_graphic_levels()
731 (uint8_t)dpm_table->sclk_table.count; in tonga_populate_all_graphic_levels()
740 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
770 for (i = 2; i < dpm_table->sclk_table.count; i++) in tonga_populate_all_graphic_levels()
1497 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in tonga_program_memory_timing_parameters()
1620 for (i = 0; i < sclk_table->count; i++) { in tonga_populate_clock_stretcher_data_table()
1622 sclk_table->entries[i].cks_enable << i; in tonga_populate_clock_stretcher_data_table()
1625 (sclk_table->entries[i].clk/100) / 10000) * 1000 / in tonga_populate_clock_stretcher_data_table()
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| H A D | fiji_smumgr.c | 1022 for (i = 0; i < dpm_table->sclk_table.count; i++) { in fiji_populate_all_graphic_levels()
1024 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels()
1042 (uint8_t)dpm_table->sclk_table.count; in fiji_populate_all_graphic_levels()
1051 for (i = 0; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1076 for (i = 2; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1316 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1532 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in fiji_program_memory_timing_parameters()
1535 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters()
1609 phm_find_boot_level(&(data->dpm_table.sclk_table), in fiji_populate_smc_boot_level()
1700 for (i = 0; i < sclk_table->count; i++) { in fiji_populate_clock_stretcher_data_table()
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| H A D | iceland_smumgr.c | 980 for (i = 0; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels()
996 if (dpm_table->sclk_table.count > 1) in iceland_populate_all_graphic_levels()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1001 (uint8_t)dpm_table->sclk_table.count; in iceland_populate_all_graphic_levels()
1003 phm_get_dpm_level_enable_mask_value(&dpm_table->sclk_table); in iceland_populate_all_graphic_levels()
1026 for (i = 2; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
1621 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in iceland_program_memory_timing_parameters()
1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1657 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in iceland_populate_smc_boot_level()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | vegam_smumgr.c | 889 for (i = 0; i < dpm_table->sclk_table.count; i++) { in vegam_populate_all_graphic_levels()
892 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels()
910 (uint8_t)dpm_table->sclk_table.count; in vegam_populate_all_graphic_levels()
914 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
923 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
948 for (i = 2; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
1291 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in vegam_program_memory_timing_parameters()
1510 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_clock_stretcher_data_table()
1512 sclk_table->entries[i].cks_enable << i; in vegam_populate_clock_stretcher_data_table()
1629 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_avfs_parameters()
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| H A D | polaris10_smumgr.c | 1067 for (i = 0; i < dpm_table->sclk_table.count; i++) { in polaris10_populate_all_graphic_levels()
1070 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels()
1084 dpm_table->sclk_table.dpm_levels[0].value, in polaris10_populate_all_graphic_levels()
1098 (uint8_t)dpm_table->sclk_table.count; in polaris10_populate_all_graphic_levels()
1111 for (i = 0; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1136 for (i = 2; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1498 for (i = 0; i < hw_data->dpm_table.sclk_table.count; i++) { in polaris10_program_memory_timing_parameters()
1501 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters()
1587 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in polaris10_populate_smc_boot_level()
1671 for (i = 0; i < sclk_table->count; i++) { in polaris10_populate_clock_stretcher_data_table()
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| H A D | tonga_smumgr.c | 710 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
712 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels()
726 if (dpm_table->sclk_table.count > 1) in tonga_populate_all_graphic_levels()
731 (uint8_t)dpm_table->sclk_table.count; in tonga_populate_all_graphic_levels()
740 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
770 for (i = 2; i < dpm_table->sclk_table.count; i++) in tonga_populate_all_graphic_levels()
1497 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in tonga_program_memory_timing_parameters()
1620 for (i = 0; i < sclk_table->count; i++) { in tonga_populate_clock_stretcher_data_table()
1622 sclk_table->entries[i].cks_enable << i; in tonga_populate_clock_stretcher_data_table()
1625 (sclk_table->entries[i].clk/100) / 10000) * 1000 / in tonga_populate_clock_stretcher_data_table()
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| H A D | fiji_smumgr.c | 1022 for (i = 0; i < dpm_table->sclk_table.count; i++) { in fiji_populate_all_graphic_levels()
1024 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels()
1042 (uint8_t)dpm_table->sclk_table.count; in fiji_populate_all_graphic_levels()
1051 for (i = 0; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1076 for (i = 2; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1316 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1532 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in fiji_program_memory_timing_parameters()
1535 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters()
1609 phm_find_boot_level(&(data->dpm_table.sclk_table), in fiji_populate_smc_boot_level()
1700 for (i = 0; i < sclk_table->count; i++) { in fiji_populate_clock_stretcher_data_table()
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| H A D | iceland_smumgr.c | 980 for (i = 0; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels()
996 if (dpm_table->sclk_table.count > 1) in iceland_populate_all_graphic_levels()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1001 (uint8_t)dpm_table->sclk_table.count; in iceland_populate_all_graphic_levels()
1003 phm_get_dpm_level_enable_mask_value(&dpm_table->sclk_table); in iceland_populate_all_graphic_levels()
1026 for (i = 2; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
1621 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in iceland_program_memory_timing_parameters()
1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1657 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in iceland_populate_smc_boot_level()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | vegam_smumgr.c | 889 for (i = 0; i < dpm_table->sclk_table.count; i++) { in vegam_populate_all_graphic_levels()
892 dpm_table->sclk_table.dpm_levels[i].value, in vegam_populate_all_graphic_levels()
910 (uint8_t)dpm_table->sclk_table.count; in vegam_populate_all_graphic_levels()
914 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
923 for (i = 0; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
948 for (i = 2; i < dpm_table->sclk_table.count; i++) in vegam_populate_all_graphic_levels()
1291 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in vegam_program_memory_timing_parameters()
1510 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_clock_stretcher_data_table()
1512 sclk_table->entries[i].cks_enable << i; in vegam_populate_clock_stretcher_data_table()
1629 for (i = 0; i < sclk_table->count; i++) { in vegam_populate_avfs_parameters()
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| H A D | polaris10_smumgr.c | 1067 for (i = 0; i < dpm_table->sclk_table.count; i++) { in polaris10_populate_all_graphic_levels()
1070 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels()
1084 dpm_table->sclk_table.dpm_levels[0].value, in polaris10_populate_all_graphic_levels()
1098 (uint8_t)dpm_table->sclk_table.count; in polaris10_populate_all_graphic_levels()
1111 for (i = 0; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1136 for (i = 2; i < dpm_table->sclk_table.count; i++) in polaris10_populate_all_graphic_levels()
1498 for (i = 0; i < hw_data->dpm_table.sclk_table.count; i++) { in polaris10_program_memory_timing_parameters()
1501 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters()
1587 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in polaris10_populate_smc_boot_level()
1671 for (i = 0; i < sclk_table->count; i++) { in polaris10_populate_clock_stretcher_data_table()
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| H A D | tonga_smumgr.c | 710 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
712 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels()
726 if (dpm_table->sclk_table.count > 1) in tonga_populate_all_graphic_levels()
731 (uint8_t)dpm_table->sclk_table.count; in tonga_populate_all_graphic_levels()
740 for (i = 0; i < dpm_table->sclk_table.count; i++) { in tonga_populate_all_graphic_levels()
770 for (i = 2; i < dpm_table->sclk_table.count; i++) in tonga_populate_all_graphic_levels()
1497 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in tonga_program_memory_timing_parameters()
1620 for (i = 0; i < sclk_table->count; i++) { in tonga_populate_clock_stretcher_data_table()
1622 sclk_table->entries[i].cks_enable << i; in tonga_populate_clock_stretcher_data_table()
1625 (sclk_table->entries[i].clk/100) / 10000) * 1000 / in tonga_populate_clock_stretcher_data_table()
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| H A D | fiji_smumgr.c | 1022 for (i = 0; i < dpm_table->sclk_table.count; i++) { in fiji_populate_all_graphic_levels()
1024 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels()
1042 (uint8_t)dpm_table->sclk_table.count; in fiji_populate_all_graphic_levels()
1051 for (i = 0; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1076 for (i = 2; i < dpm_table->sclk_table.count; i++) in fiji_populate_all_graphic_levels()
1316 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1532 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in fiji_program_memory_timing_parameters()
1535 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters()
1609 phm_find_boot_level(&(data->dpm_table.sclk_table), in fiji_populate_smc_boot_level()
1700 for (i = 0; i < sclk_table->count; i++) { in fiji_populate_clock_stretcher_data_table()
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| H A D | iceland_smumgr.c | 980 for (i = 0; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
982 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels()
996 if (dpm_table->sclk_table.count > 1) in iceland_populate_all_graphic_levels()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1001 (uint8_t)dpm_table->sclk_table.count; in iceland_populate_all_graphic_levels()
1003 phm_get_dpm_level_enable_mask_value(&dpm_table->sclk_table); in iceland_populate_all_graphic_levels()
1026 for (i = 2; i < dpm_table->sclk_table.count; i++) { in iceland_populate_all_graphic_levels()
1621 for (i = 0; i < data->dpm_table.sclk_table.count; i++) { in iceland_program_memory_timing_parameters()
1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1657 result = phm_find_boot_level(&(data->dpm_table.sclk_table), in iceland_populate_smc_boot_level()
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | ci_dpm.c | 2993 &pi->dpm_table.sclk_table, in ci_setup_default_dpm_tables()
3008 pi->dpm_table.sclk_table.count = 0; in ci_setup_default_dpm_tables()
3011 (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != in ci_setup_default_dpm_tables()
3013 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables()
3015 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = true; in ci_setup_default_dpm_tables()
3016 pi->dpm_table.sclk_table.count++; in ci_setup_default_dpm_tables()
3292 &pi->dpm_table.sclk_table, in ci_trim_dpm_states()
3387 struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3395 for (i = 0; i < sclk_table->count; i++) { in ci_find_dpm_states_clocks_in_dpm_table()
3400 if (i >= sclk_table->count) { in ci_find_dpm_states_clocks_in_dpm_table()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3428 &pi->dpm_table.sclk_table, in ci_setup_default_dpm_tables()
3443 pi->dpm_table.sclk_table.count = 0; in ci_setup_default_dpm_tables()
3446 (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != in ci_setup_default_dpm_tables()
3448 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables()
3450 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = in ci_setup_default_dpm_tables()
3452 pi->dpm_table.sclk_table.count++; in ci_setup_default_dpm_tables()
3729 &pi->dpm_table.sclk_table, in ci_trim_dpm_states()
3824 struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3832 for (i = 0; i < sclk_table->count; i++) { in ci_find_dpm_states_clocks_in_dpm_table()
3837 if (i >= sclk_table->count) { in ci_find_dpm_states_clocks_in_dpm_table()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3428 &pi->dpm_table.sclk_table, in ci_setup_default_dpm_tables()
3443 pi->dpm_table.sclk_table.count = 0; in ci_setup_default_dpm_tables()
3446 (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != in ci_setup_default_dpm_tables()
3448 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables()
3450 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = in ci_setup_default_dpm_tables()
3452 pi->dpm_table.sclk_table.count++; in ci_setup_default_dpm_tables()
3729 &pi->dpm_table.sclk_table, in ci_trim_dpm_states()
3824 struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3832 for (i = 0; i < sclk_table->count; i++) { in ci_find_dpm_states_clocks_in_dpm_table()
3837 if (i >= sclk_table->count) { in ci_find_dpm_states_clocks_in_dpm_table()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3428 &pi->dpm_table.sclk_table, in ci_setup_default_dpm_tables()
3443 pi->dpm_table.sclk_table.count = 0; in ci_setup_default_dpm_tables()
3446 (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != in ci_setup_default_dpm_tables()
3448 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables()
3450 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = in ci_setup_default_dpm_tables()
3452 pi->dpm_table.sclk_table.count++; in ci_setup_default_dpm_tables()
3729 &pi->dpm_table.sclk_table, in ci_trim_dpm_states()
3824 struct ci_single_dpm_table *sclk_table = &pi->dpm_table.sclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3832 for (i = 0; i < sclk_table->count; i++) { in ci_find_dpm_states_clocks_in_dpm_table()
3837 if (i >= sclk_table->count) { in ci_find_dpm_states_clocks_in_dpm_table()
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