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Searched refs:set_dma_channel (Results 1 – 25 of 64) sorted by relevance

123

/dports/emulators/mess/mame-mame0226/src/devices/machine/
H A Dwd7600.h137 DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); } in DECLARE_WRITE_LINE_MEMBER()
138 DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); } in DECLARE_WRITE_LINE_MEMBER()
139 DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); } in DECLARE_WRITE_LINE_MEMBER()
140 DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); } in DECLARE_WRITE_LINE_MEMBER()
142 DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); } in DECLARE_WRITE_LINE_MEMBER()
143 DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); } in DECLARE_WRITE_LINE_MEMBER()
144 DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); } in DECLARE_WRITE_LINE_MEMBER()
171 void set_dma_channel(int channel, bool state);
H A Dcs4031.h134 void set_dma_channel(int channel, bool state);
227 DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); } in DECLARE_WRITE_LINE_MEMBER()
228 DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); } in DECLARE_WRITE_LINE_MEMBER()
229 DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); } in DECLARE_WRITE_LINE_MEMBER()
230 DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); } in DECLARE_WRITE_LINE_MEMBER()
232 DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); } in DECLARE_WRITE_LINE_MEMBER()
233 DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); } in DECLARE_WRITE_LINE_MEMBER()
234 DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); } in DECLARE_WRITE_LINE_MEMBER()
H A Dfdc37c93x.cpp973 m_isa->set_dma_channel(0, this, true); in device_start()
974 m_isa->set_dma_channel(1, this, true); in device_start()
975 m_isa->set_dma_channel(2, this, true); in device_start()
976 m_isa->set_dma_channel(3, this, true); in device_start()
/dports/emulators/mame/mame-mame0226/src/devices/machine/
H A Dwd7600.h137 DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); } in DECLARE_WRITE_LINE_MEMBER()
138 DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); } in DECLARE_WRITE_LINE_MEMBER()
139 DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); } in DECLARE_WRITE_LINE_MEMBER()
140 DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); } in DECLARE_WRITE_LINE_MEMBER()
142 DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); } in DECLARE_WRITE_LINE_MEMBER()
143 DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); } in DECLARE_WRITE_LINE_MEMBER()
144 DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); } in DECLARE_WRITE_LINE_MEMBER()
171 void set_dma_channel(int channel, bool state);
H A Dcs4031.h134 void set_dma_channel(int channel, bool state);
227 DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); } in DECLARE_WRITE_LINE_MEMBER()
228 DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); } in DECLARE_WRITE_LINE_MEMBER()
229 DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); } in DECLARE_WRITE_LINE_MEMBER()
230 DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); } in DECLARE_WRITE_LINE_MEMBER()
232 DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); } in DECLARE_WRITE_LINE_MEMBER()
233 DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); } in DECLARE_WRITE_LINE_MEMBER()
234 DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); } in DECLARE_WRITE_LINE_MEMBER()
H A Dfdc37c93x.cpp973 m_isa->set_dma_channel(0, this, true); in device_start()
974 m_isa->set_dma_channel(1, this, true); in device_start()
975 m_isa->set_dma_channel(2, this, true); in device_start()
976 m_isa->set_dma_channel(3, this, true); in device_start()
/dports/emulators/mess/mame-mame0226/src/mame/machine/
H A Dpcshare.cpp101 void pcat_base_state::set_dma_channel(int channel, int state) in set_dma_channel() function in pcat_base_state
106 WRITE_LINE_MEMBER( pcat_base_state::pc_dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
107 WRITE_LINE_MEMBER( pcat_base_state::pc_dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
108 WRITE_LINE_MEMBER( pcat_base_state::pc_dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
109 WRITE_LINE_MEMBER( pcat_base_state::pc_dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()
H A Dat.cpp354 void at_mb_device::set_dma_channel(int channel, int state) in set_dma_channel() function in at_mb_device
391 WRITE_LINE_MEMBER( at_mb_device::dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
392 WRITE_LINE_MEMBER( at_mb_device::dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
393 WRITE_LINE_MEMBER( at_mb_device::dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
394 WRITE_LINE_MEMBER( at_mb_device::dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()
396 WRITE_LINE_MEMBER( at_mb_device::dack5_w ) { set_dma_channel(5, state); } in WRITE_LINE_MEMBER()
397 WRITE_LINE_MEMBER( at_mb_device::dack6_w ) { set_dma_channel(6, state); } in WRITE_LINE_MEMBER()
398 WRITE_LINE_MEMBER( at_mb_device::dack7_w ) { set_dma_channel(7, state); } in WRITE_LINE_MEMBER()
H A Dbebox.cpp554 static void set_dma_channel(running_machine &machine, int channel, int state) in set_dma_channel() function
560 WRITE_LINE_MEMBER(bebox_state::pc_dack0_w){ set_dma_channel(machine(), 0, state); } in WRITE_LINE_MEMBER()
561 WRITE_LINE_MEMBER(bebox_state::pc_dack1_w){ set_dma_channel(machine(), 1, state); } in WRITE_LINE_MEMBER()
562 WRITE_LINE_MEMBER(bebox_state::pc_dack2_w){ set_dma_channel(machine(), 2, state); } in WRITE_LINE_MEMBER()
563 WRITE_LINE_MEMBER(bebox_state::pc_dack3_w){ set_dma_channel(machine(), 3, state); } in WRITE_LINE_MEMBER()
H A Dpcshare.h35 void set_dma_channel(int channel, int state);
H A Dat.h40 void set_dma_channel(int channel, int state);
/dports/emulators/mame/mame-mame0226/src/mame/machine/
H A Dpcshare.cpp101 void pcat_base_state::set_dma_channel(int channel, int state) in set_dma_channel() function in pcat_base_state
106 WRITE_LINE_MEMBER( pcat_base_state::pc_dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
107 WRITE_LINE_MEMBER( pcat_base_state::pc_dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
108 WRITE_LINE_MEMBER( pcat_base_state::pc_dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
109 WRITE_LINE_MEMBER( pcat_base_state::pc_dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()
H A Dat.cpp354 void at_mb_device::set_dma_channel(int channel, int state) in set_dma_channel() function in at_mb_device
391 WRITE_LINE_MEMBER( at_mb_device::dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
392 WRITE_LINE_MEMBER( at_mb_device::dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
393 WRITE_LINE_MEMBER( at_mb_device::dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
394 WRITE_LINE_MEMBER( at_mb_device::dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()
396 WRITE_LINE_MEMBER( at_mb_device::dack5_w ) { set_dma_channel(5, state); } in WRITE_LINE_MEMBER()
397 WRITE_LINE_MEMBER( at_mb_device::dack6_w ) { set_dma_channel(6, state); } in WRITE_LINE_MEMBER()
398 WRITE_LINE_MEMBER( at_mb_device::dack7_w ) { set_dma_channel(7, state); } in WRITE_LINE_MEMBER()
H A Dbebox.cpp554 static void set_dma_channel(running_machine &machine, int channel, int state) in set_dma_channel() function
560 WRITE_LINE_MEMBER(bebox_state::pc_dack0_w){ set_dma_channel(machine(), 0, state); } in WRITE_LINE_MEMBER()
561 WRITE_LINE_MEMBER(bebox_state::pc_dack1_w){ set_dma_channel(machine(), 1, state); } in WRITE_LINE_MEMBER()
562 WRITE_LINE_MEMBER(bebox_state::pc_dack2_w){ set_dma_channel(machine(), 2, state); } in WRITE_LINE_MEMBER()
563 WRITE_LINE_MEMBER(bebox_state::pc_dack3_w){ set_dma_channel(machine(), 3, state); } in WRITE_LINE_MEMBER()
H A Dpcshare.h35 void set_dma_channel(int channel, int state);
H A Dat.h40 void set_dma_channel(int channel, int state);
/dports/emulators/mess/mame-mame0226/src/devices/bus/isa/
H A Dfdc.cpp202 m_isa->set_dma_channel(2, this, true); in device_start()
249 m_isa->set_dma_channel(2, this, true); in device_start()
271 m_isa->set_dma_channel(2, this, true); in device_start()
292 m_isa->set_dma_channel(2, this, true); in device_start()
312 m_isa->set_dma_channel(2, this, true); in device_start()
H A Dmufdc.cpp165 m_isa->set_dma_channel(2, this, true); in device_reset()
H A Dwdxt_gen.cpp204 m_isa->set_dma_channel(3, this, false); in device_start()
/dports/emulators/mame/mame-mame0226/src/devices/bus/isa/
H A Dfdc.cpp202 m_isa->set_dma_channel(2, this, true); in device_start()
249 m_isa->set_dma_channel(2, this, true); in device_start()
271 m_isa->set_dma_channel(2, this, true); in device_start()
292 m_isa->set_dma_channel(2, this, true); in device_start()
312 m_isa->set_dma_channel(2, this, true); in device_start()
H A Dmufdc.cpp165 m_isa->set_dma_channel(2, this, true); in device_reset()
/dports/emulators/mess/mame-mame0226/src/mame/drivers/
H A Dapc.cpp182 inline void set_dma_channel(int channel, int state);
887 inline void apc_state::set_dma_channel(int channel, int state) in set_dma_channel() function in apc_state
892 WRITE_LINE_MEMBER(apc_state::apc_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(0, state);… in WRITE_LINE_MEMBER()
893 WRITE_LINE_MEMBER(apc_state::apc_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(1, state);… in WRITE_LINE_MEMBER()
894 WRITE_LINE_MEMBER(apc_state::apc_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(2, state);… in WRITE_LINE_MEMBER()
895 WRITE_LINE_MEMBER(apc_state::apc_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(3, state);… in WRITE_LINE_MEMBER()
H A Dngen.cpp191 void set_dma_channel(int channel, int state);
689 void ngen_state::set_dma_channel(int channel, int state) in set_dma_channel() function in ngen_state
697 WRITE_LINE_MEMBER( ngen_state::dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
698 WRITE_LINE_MEMBER( ngen_state::dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
699 WRITE_LINE_MEMBER( ngen_state::dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
700 WRITE_LINE_MEMBER( ngen_state::dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()
/dports/emulators/mame/mame-mame0226/src/mame/drivers/
H A Dapc.cpp182 inline void set_dma_channel(int channel, int state);
887 inline void apc_state::set_dma_channel(int channel, int state) in set_dma_channel() function in apc_state
892 WRITE_LINE_MEMBER(apc_state::apc_dack0_w){ /*printf("%02x 0\n",state);*/ set_dma_channel(0, state);… in WRITE_LINE_MEMBER()
893 WRITE_LINE_MEMBER(apc_state::apc_dack1_w){ /*printf("%02x 1\n",state);*/ set_dma_channel(1, state);… in WRITE_LINE_MEMBER()
894 WRITE_LINE_MEMBER(apc_state::apc_dack2_w){ /*printf("%02x 2\n",state);*/ set_dma_channel(2, state);… in WRITE_LINE_MEMBER()
895 WRITE_LINE_MEMBER(apc_state::apc_dack3_w){ /*printf("%02x 3\n",state);*/ set_dma_channel(3, state);… in WRITE_LINE_MEMBER()
H A Dngen.cpp191 void set_dma_channel(int channel, int state);
689 void ngen_state::set_dma_channel(int channel, int state) in set_dma_channel() function in ngen_state
697 WRITE_LINE_MEMBER( ngen_state::dack0_w ) { set_dma_channel(0, state); } in WRITE_LINE_MEMBER()
698 WRITE_LINE_MEMBER( ngen_state::dack1_w ) { set_dma_channel(1, state); } in WRITE_LINE_MEMBER()
699 WRITE_LINE_MEMBER( ngen_state::dack2_w ) { set_dma_channel(2, state); } in WRITE_LINE_MEMBER()
700 WRITE_LINE_MEMBER( ngen_state::dack3_w ) { set_dma_channel(3, state); } in WRITE_LINE_MEMBER()

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