Searched refs:si21 (Results 1 – 5 of 5) sorted by relevance
/dports/science/iboview/ibo-view.20150427/src/IrCore/ |
H A D | IrSlmX.cpp | 54 static double const si21 = 7.9056941504209488e-01; variable 135 Out[25] = si20 * z * Out[18] - si21 * rsq * Out[9]; in EvalSlmX_Deriv0() 136 Out[26] = si20 * z * Out[20] - si21 * rsq * Out[10]; in EvalSlmX_Deriv0() 306 Out[100] = si20 * z * Out[72] - si21 * rsq * Out[36]; in EvalSlmX_Deriv1() 307 Out[101] = si20 * z * Out[73] - (si21 * (rsq * Out[37] + 2*x * Out[36])); in EvalSlmX_Deriv1() 308 Out[102] = si20 * z * Out[74] - (si21 * (rsq * Out[38] + 2*y * Out[36])); in EvalSlmX_Deriv1() 310 Out[104] = si20 * z * Out[80] - si21 * rsq * Out[40]; in EvalSlmX_Deriv1() 311 Out[105] = si20 * z * Out[81] - (si21 * (rsq * Out[41] + 2*x * Out[40])); in EvalSlmX_Deriv1() 312 Out[106] = si20 * z * Out[82] - (si21 * (rsq * Out[42] + 2*y * Out[40])); in EvalSlmX_Deriv1() 744 Out[250] = si20 * z * Out[180] - si21 * rsq * Out[90]; in EvalSlmX_Deriv2() [all …]
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/dports/lang/racket/racket-8.3/share/pkgs/math-lib/math/private/vector/ |
H A D | vector-fft.rkt | 70 (define si21 (unsafe-fx+ si2 1)) 74 (unsafe-flvector-set! xs-r sin2 (unsafe-flvector-ref as-r si21)) 75 (unsafe-flvector-set! xs-i sin2 (unsafe-flvector-ref as-i si21))
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/dports/www/firefox/firefox-99.0/js/src/jit/loong64/ |
H A D | Assembler-loong64.h | 1648 InstImm(OpcodeField op, int32_t si21, Register rj, bool NotHasRd) in InstImm() argument 1649 : Instruction(NotHasRd ? op | (si21 & Imm16Mask) << RKShift | RJ(rj) | in InstImm() 1650 (si21 & Imm21Mask) >> 16 in InstImm() 1654 MOZ_ASSERT(is_intN(si21, 21)); in InstImm() 1660 MOZ_ASSERT(is_intN(si21, 20) || is_uintN(si21, 20)); in InstImm() 1663 InstImm(OpcodeField op, int32_t si21, AssemblerLOONG64::FPConditionBit cj, in InstImm() argument 1666 ? op | (si21 & Imm16Mask) << RKShift | in InstImm() 1667 (cj + 8) << CJShift | (si21 & Imm21Mask) >> 16 in InstImm() 1668 : op | (si21 & Imm16Mask) << RKShift | cj << CJShift | in InstImm() 1669 (si21 & Imm21Mask) >> 16) { in InstImm() [all …]
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/dports/lang/v8/v8-9.6.180.12/src/codegen/loong64/ |
H A D | assembler-loong64.cc | 678 void Assembler::GenB(Opcode opcode, Register rj, int32_t si21) { in GenB() argument 681 Instr instr = opcode | (si21 & kImm16Mask) << kRkShift | in GenB() 682 (rj.code() << kRjShift) | ((si21 & 0x1fffff) >> 16); in GenB() 686 void Assembler::GenB(Opcode opcode, CFRegister cj, int32_t si21, bool isEq) { in GenB() argument 688 DCHECK(BCZ == opcode && is_int21(si21)); in GenB() 691 Instr instr = opcode | (si21 & kImm16Mask) << kRkShift | (sc << kRjShift) | in GenB() 692 ((si21 & 0x1fffff) >> 16); in GenB() 1013 void Assembler::bceqz(CFRegister cj, int32_t si21) { in bceqz() argument 1014 GenB(BCZ, cj, si21, true); in bceqz() 1017 void Assembler::bcnez(CFRegister cj, int32_t si21) { in bcnez() argument [all …]
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H A D | assembler-loong64.h | 367 void bceqz(CFRegister cj, int32_t si21); 371 void bcnez(CFRegister cj, int32_t si21); 964 void GenB(Opcode opcode, Register rj, int32_t si21); // opcode:6 965 void GenB(Opcode opcode, CFRegister cj, int32_t si21, bool isEq);
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