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Searched refs:smax (Results 1 – 25 of 4500) sorted by relevance

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/dports/japanese/libslang/slang-1.4.5jp2/src/
H A Dslscanf.c46 if (s + 1 < smax) in get_sign()
69 while (s < smax) in parse_long()
151 if (s >= smax) in parse_double()
172 while (s < smax) in parse_double()
198 while (s < smax) in parse_double()
228 while (s < smax) in parse_double()
281 while (s < smax) in parse_string()
302 *sp = smax; in parse_bstring()
407 char *smax; in _SLang_sscanf() local
450 smax = input_string_max; in _SLang_sscanf()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/yasm/source/patched-yasm/tools/genperf/
H A Dperfect.c639 *smax = *smax * 2; in hash_ab()
725 *smax = *smax * 2; in initalen()
734 *blen = ((nkeys <= *smax*0.56) ? *smax/32 : in initalen()
735 (nkeys <= *smax*0.74) ? *smax/16 : *smax/8); in initalen()
738 (nkeys <= *smax*0.8) ? *smax/8 : *smax/4); in initalen()
774 *alen = ((nkeys <= *smax*0.52) ? *smax/8 : *smax/4); in initalen()
775 *blen = ((nkeys <= *smax*0.52) ? *smax/8 : *smax/4); in initalen()
780 (nkeys <= *smax*(3.0/4.0)) ? *smax/4 : *smax/2); in initalen()
793 *blen = (nkeys <= *smax*(5.0/8.0)) ? *smax/4 : *smax/2; in initalen()
798 *alen = (nkeys <= *smax*(5.0/8.0)) ? *smax/8 : *smax/2; in initalen()
[all …]
/dports/devel/yasm/yasm-1.3.0/tools/genperf/
H A Dperfect.c639 *smax = *smax * 2; in hash_ab()
725 *smax = *smax * 2; in initalen()
734 *blen = ((nkeys <= *smax*0.56) ? *smax/32 : in initalen()
735 (nkeys <= *smax*0.74) ? *smax/16 : *smax/8); in initalen()
738 (nkeys <= *smax*0.8) ? *smax/8 : *smax/4); in initalen()
774 *alen = ((nkeys <= *smax*0.52) ? *smax/8 : *smax/4); in initalen()
775 *blen = ((nkeys <= *smax*0.52) ? *smax/8 : *smax/4); in initalen()
780 (nkeys <= *smax*(3.0/4.0)) ? *smax/4 : *smax/2); in initalen()
793 *blen = (nkeys <= *smax*(5.0/8.0)) ? *smax/4 : *smax/2; in initalen()
798 *alen = (nkeys <= *smax*(5.0/8.0)) ? *smax/8 : *smax/2; in initalen()
[all …]
/dports/devel/libslang2/slang-2.3.2/src/
H A Dslscanf.c67 if (s + 1 < smax) in get_sign()
89 while (s < smax) in parse_long()
220 if (s >= smax) in parse_double()
229 if (s + 3 <= smax) in parse_double()
243 while (s < smax) in parse_double()
269 if ((s + 8 <= smax) in parse_double()
305 while (s < smax) in parse_double()
331 while (s < smax) in parse_double()
362 while (s < smax) in parse_double()
411 while (s < smax) in parse_string()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.experimental.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.experimental.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.experimental.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.experimental.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.experimental.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.experimental.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.experimental.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.experimental.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.experimental.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Analysis/CostModel/ARM/
H A Dreduce-smax.ll150 declare i64 @llvm.experimental.vector.reduce.smax.v1i64(<1 x i64>)
151 declare i64 @llvm.experimental.vector.reduce.smax.v2i64(<2 x i64>)
152 declare i64 @llvm.experimental.vector.reduce.smax.v4i64(<4 x i64>)
153 declare i64 @llvm.experimental.vector.reduce.smax.v8i64(<8 x i64>)
156 declare i32 @llvm.experimental.vector.reduce.smax.v2i32(<2 x i32>)
169 declare i8 @llvm.experimental.vector.reduce.smax.v2i8(<2 x i8>)
170 declare i8 @llvm.experimental.vector.reduce.smax.v4i8(<4 x i8>)
171 declare i8 @llvm.experimental.vector.reduce.smax.v8i8(<8 x i8>)
172 declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>)
173 declare i8 @llvm.experimental.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll308 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
311 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
314 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
327 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
331 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.experimental.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.experimental.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.experimental.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.experimental.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.experimental.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.experimental.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.experimental.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.experimental.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.experimental.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.experimental.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.experimental.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.experimental.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.experimental.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.experimental.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.experimental.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.experimental.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.experimental.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.experimental.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll307 declare i64 @llvm.vector.reduce.smax.v1i64(<1 x i64>)
308 declare i64 @llvm.vector.reduce.smax.v2i64(<2 x i64>)
309 declare i64 @llvm.vector.reduce.smax.v4i64(<4 x i64>)
310 declare i64 @llvm.vector.reduce.smax.v8i64(<8 x i64>)
313 declare i32 @llvm.vector.reduce.smax.v2i32(<2 x i32>)
326 declare i8 @llvm.vector.reduce.smax.v2i8(<2 x i8>)
327 declare i8 @llvm.vector.reduce.smax.v4i8(<4 x i8>)
328 declare i8 @llvm.vector.reduce.smax.v8i8(<8 x i8>)
329 declare i8 @llvm.vector.reduce.smax.v16i8(<16 x i8>)
330 declare i8 @llvm.vector.reduce.smax.v32i8(<32 x i8>)
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/Analysis/CostModel/X86/
H A Dreduce-smax.ll298 declare i64 @llvm.experimental.vector.reduce.smax.v1i64(<1 x i64>)
299 declare i64 @llvm.experimental.vector.reduce.smax.v2i64(<2 x i64>)
300 declare i64 @llvm.experimental.vector.reduce.smax.v4i64(<4 x i64>)
301 declare i64 @llvm.experimental.vector.reduce.smax.v8i64(<8 x i64>)
304 declare i32 @llvm.experimental.vector.reduce.smax.v2i32(<2 x i32>)
317 declare i8 @llvm.experimental.vector.reduce.smax.v2i8(<2 x i8>)
318 declare i8 @llvm.experimental.vector.reduce.smax.v4i8(<4 x i8>)
319 declare i8 @llvm.experimental.vector.reduce.smax.v8i8(<8 x i8>)
320 declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>)
321 declare i8 @llvm.experimental.vector.reduce.smax.v32i8(<32 x i8>)
[all …]

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