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Searched refs:sphys (Results 1 – 25 of 187) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h305 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
306 (((sphys) == 9) && \
310 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
311 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h305 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
306 (((sphys) == 9) && \
310 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
311 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h305 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
306 (((sphys) == 9) && \
310 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
311 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h305 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
306 (((sphys) == 9) && \
310 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
311 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.h307 #define MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) \ argument
308 (((sphys) == 9) && \
312 #define MV_DDR_IS_HALF_BUS_DRAM_MODE(mask, sphys) \ argument
313 (MV_DDR_IS_32BIT_IN_64BIT_DRAM_MODE(mask, sphys) || \

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