| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 348 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_gfx_cs.c | 536 memset(ctx->tracked_regs.spi_ps_input_cntl, 0xff, sizeof(uint32_t) * 32); in si_begin_new_gfx_cs()
|
| H A D | si_state_shaders.c | 3252 unsigned spi_ps_input_cntl[32]; in si_emit_spi_map() local
3265 spi_ps_input_cntl[num_written++] = si_get_ps_input_cntl(sctx, vs, name, index, interpolate); in si_emit_spi_map()
3280 spi_ps_input_cntl[num_written++] = si_get_ps_input_cntl(sctx, vs, bcol, i, bcol_interp[i]); in si_emit_spi_map()
3289 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
3290 sctx->tracked_regs.spi_ps_input_cntl, num_interp); in si_emit_spi_map()
|
| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| H A D | si_gfx_cs.c | 518 memset(ctx->tracked_regs.spi_ps_input_cntl, 0xff, sizeof(uint32_t) * 32); in si_begin_new_gfx_cs()
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| H A D | si_gfx_cs.c | 518 memset(ctx->tracked_regs.spi_ps_input_cntl, 0xff, sizeof(uint32_t) * 32); in si_begin_new_gfx_cs()
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 351 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 349 uint32_t spi_ps_input_cntl[32]; member
|
| H A D | si_state_draw.cpp | 57 unsigned spi_ps_input_cntl[NUM_INTERP]; in si_emit_spi_map() local
96 spi_ps_input_cntl[i] = ps_input_cntl; in si_emit_spi_map()
103 radeon_opt_set_context_regn(sctx, R_028644_SPI_PS_INPUT_CNTL_0, spi_ps_input_cntl, in si_emit_spi_map()
104 sctx->tracked_regs.spi_ps_input_cntl, NUM_INTERP); in si_emit_spi_map()
|