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Searched refs:stable_pstate_mclk (Results 1 – 6 of 6) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3252 uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in vega10_apply_state_adjust_rules() local
3309 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3312 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
3377 vega10_ps->performance_levels[i].mem_clock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
H A Dsmu7_hwmgr.c3275 int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in smu7_apply_state_adjust_rules() local
3322 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3325 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()
3423 smu7_ps->performance_levels[i].memory_clock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3252 uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in vega10_apply_state_adjust_rules() local
3309 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3312 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
3377 vega10_ps->performance_levels[i].mem_clock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
H A Dsmu7_hwmgr.c3275 int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in smu7_apply_state_adjust_rules() local
3322 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3325 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()
3423 smu7_ps->performance_levels[i].memory_clock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3252 uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in vega10_apply_state_adjust_rules() local
3309 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3312 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
3377 vega10_ps->performance_levels[i].mem_clock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()
H A Dsmu7_hwmgr.c3275 int32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; in smu7_apply_state_adjust_rules() local
3322 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3325 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()
3423 smu7_ps->performance_levels[i].memory_clock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()