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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/llvm90/llvm-9.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/devel/llvm80/llvm-8.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
H A Dmicromips-invalid.s28 swm16 $5, $6, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 …swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers…
30 swm16 $16-$25, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
/dports/devel/llvm70/llvm-7.0.1.src/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/Mips/
H A Dmicromips-loadstore-instructions.s46 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
56 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
105 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
115 # CHECK-EB: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x52]
151 swm16 $16, $17, $ra, 8($sp)

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