| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1154 tcg_gen_add_reg(dest, in1, in2); in do_add()
1156 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1392 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2355 tcg_gen_add_reg(dest, src1, src2); in trans_base_idx_mod()
2780 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2781 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3405 tcg_gen_add_reg(dest, in1, in2); in trans_addb()
3413 tcg_gen_add_reg(dest, in1, in2); in trans_addb()
[all …]
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| /dports/emulators/qemu/qemu-6.2.0/target/hppa/ |
| H A D | translate.c | 78 #define tcg_gen_add_reg tcg_gen_add_i64 macro
173 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1135 tcg_gen_add_reg(dest, in1, in2); in do_add()
1137 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1435 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2392 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2759 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2789 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2790 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3068 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1472 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2435 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2811 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2841 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2842 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3109 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1474 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2437 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2813 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2843 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2844 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3124 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1474 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2437 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2813 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2843 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2844 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3124 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1472 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2435 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2811 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2841 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2842 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3109 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/hppa/ |
| H A D | translate.c | 78 #define tcg_gen_add_reg tcg_gen_add_i64 macro
173 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1139 tcg_gen_add_reg(dest, in1, in2); in do_add()
1141 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1439 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2400 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2767 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2797 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2798 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3076 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1472 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2435 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2811 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2841 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2842 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3122 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/target/hppa/ |
| H A D | translate.c | 81 #define tcg_gen_add_reg tcg_gen_add_i64 macro
176 #define tcg_gen_add_reg tcg_gen_add_i32 macro
1170 tcg_gen_add_reg(dest, in1, in2); in do_add()
1172 tcg_gen_add_reg(dest, dest, cpu_psw_cb_msb); in do_add()
1474 tcg_gen_add_reg(ofs, ofs, base); in form_gva()
2437 tcg_gen_add_reg(dest, src1, src2); in trans_nop_addrx()
2813 is_i ? tcg_gen_add_reg : tcg_gen_sub_reg); in do_dcor()
2843 tcg_gen_add_reg(add1, in1, in1); in trans_ds()
2844 tcg_gen_add_reg(add1, add1, cpu_psw_cb_msb); in trans_ds()
3124 tcg_gen_add_reg(dest, in1, in2); in do_addb()
[all …]
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