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Searched refs:tcg_gen_gvec_dup_i32 (Results 1 – 25 of 43) sorted by relevance

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/dports/emulators/qemu/qemu-6.2.0/target/hexagon/
H A Dgen_tcg_hvx.h511 tcg_gen_gvec_dup_i32(MO_32, VdV_off, \
515 tcg_gen_gvec_dup_i32(MO_16, VdV_off, \
519 tcg_gen_gvec_dup_i32(MO_8, VdV_off, \
/dports/emulators/qemu60/qemu-6.0.0/include/tcg/
H A Dtcg-op-gvec.h320 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
328 # define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32
/dports/emulators/qemu5/qemu-5.2.0/include/tcg/
H A Dtcg-op-gvec.h320 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
328 # define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32
/dports/emulators/qemu/qemu-6.2.0/include/tcg/
H A Dtcg-op-gvec.h320 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
328 # define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/tcg/
H A Dtcg-op-gvec.h320 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
328 # define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/
H A Dtcg-op-gvec.h262 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
H A Dtcg-op-gvec.c1260 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t oprsz, in tcg_gen_gvec_dup_i32() function
1292 tcg_gen_gvec_dup_i32(vece, dofs, oprsz, maxsz, in); in tcg_gen_gvec_dup_mem()
/dports/emulators/qemu-utils/qemu-4.2.1/tcg/
H A Dtcg-op-gvec.h309 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
/dports/emulators/qemu42/qemu-4.2.1/tcg/
H A Dtcg-op-gvec.h309 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dtranslate-m-nocp.c347 tcg_gen_gvec_dup_i32(MO_32, offsetof(CPUARMState, vfp.qc), in gen_M_fp_sysreg_write()
H A Dtranslate-neon.c617 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd), in trans_VLD_all_lanes()
622 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd), in trans_VLD_all_lanes()
H A Dtranslate-mve.c505 tcg_gen_gvec_dup_i32(a->size, mve_qreg_offset(a->qd), 16, 16, rt); in trans_VDUP()
H A Dtranslate-vfp.c773 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(a->vn), in trans_VDUP()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/tcg/
H A Dtcg-op-gvec.h316 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dtranslate-m-nocp.c347 tcg_gen_gvec_dup_i32(MO_32, offsetof(CPUARMState, vfp.qc), in gen_M_fp_sysreg_write()
H A Dtranslate-neon.c617 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd), in trans_VLD_all_lanes()
622 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd), in trans_VLD_all_lanes()
H A Dtranslate-mve.c505 tcg_gen_gvec_dup_i32(a->size, mve_qreg_offset(a->qd), 16, 16, rt); in trans_VDUP()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/tcg/
H A Dtcg-op-gvec.h316 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dtranslate-vfp.inc.c691 tcg_gen_gvec_dup_i32(size, neon_reg_offset(a->vn, 0), in trans_VDUP()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dtranslate-vfp.inc.c624 tcg_gen_gvec_dup_i32(size, neon_reg_offset(a->vn, 0), in trans_VDUP()
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dtranslate-vfp.inc.c691 tcg_gen_gvec_dup_i32(size, neon_reg_offset(a->vn, 0), in trans_VDUP()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dtranslate-vfp.inc.c624 tcg_gen_gvec_dup_i32(size, neon_reg_offset(a->vn, 0), in trans_VDUP()
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dtranslate-neon.c.inc569 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd),
574 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd),
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dtranslate-neon.c.inc569 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd),
574 tcg_gen_gvec_dup_i32(size, neon_full_reg_offset(vd),
/dports/emulators/qemu5/qemu-5.2.0/target/ppc/translate/
H A Dvsx-impl.c.inc166 tcg_gen_gvec_dup_i32(MO_UL, vsr_full_offset(xT(ctx->opcode)), 16, 16, data);

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