| /dports/emulators/qemu/qemu-6.2.0/target/hppa/ |
| H A D | translate.c | 77 #define tcg_gen_st_reg tcg_gen_st_i64 macro
172 #define tcg_gen_st_reg tcg_gen_st_i32 macro
768 tcg_gen_st_reg(tcg_constant_reg(ctx->insn), in gen_excp_iir()
2029 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2218 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2219 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2227 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2234 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2068 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2257 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2258 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2266 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2273 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu5/qemu-5.2.0/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2070 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2259 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2260 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2268 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2275 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2070 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2259 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2260 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2268 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2275 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu42/qemu-4.2.1/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2068 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2257 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2258 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2266 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2273 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/hppa/ |
| H A D | translate.c | 77 #define tcg_gen_st_reg tcg_gen_st_i64 macro
172 #define tcg_gen_st_reg tcg_gen_st_i32 macro
768 tcg_gen_st_reg(tcg_constant_reg(ctx->insn), in gen_excp_iir()
2033 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2222 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2223 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2231 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2238 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2068 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2257 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2258 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2266 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2273 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu60/qemu-6.0.0/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
795 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
2070 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2259 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2260 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2268 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2275 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/hppa/ |
| H A D | translate.c | 80 #define tcg_gen_st_reg tcg_gen_st_i64 macro
175 #define tcg_gen_st_reg tcg_gen_st_i32 macro
737 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[CR_IIR])); in gen_excp_iir()
1964 tcg_gen_st_reg(cpu_gr[26], cpu_env, offsetof(CPUHPPAState, cr[27])); in do_page_zero()
2164 tcg_gen_st_reg(tmp, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
2165 tcg_gen_st_reg(reg, cpu_env, in trans_mtctl()
2170 tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); in trans_mtctl()
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