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Searched refs:tcg_out_opc_br (Results 1 – 11 of 11) sorted by relevance

/dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/
H A Dtcg-target.c374 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
694 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
981 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
988 tcg_out_opc_br(s, OPC_BNE, addrh, base); in tcg_out_tlb_load()
1054 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/
H A Dtcg-target.c374 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,
694 tcg_out_opc_br(s, b_opc, arg1, arg2);
981 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
988 tcg_out_opc_br(s, OPC_BNE, addrh, base);
1054 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
/dports/emulators/qemu-utils/qemu-4.2.1/tcg/mips/
H A Dtcg-target.inc.c484 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
929 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
1273 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
1284 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0); in tcg_out_tlb_load()
1350 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/mips/
H A Dtcg-target.inc.c484 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
929 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
1273 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
1284 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0); in tcg_out_tlb_load()
1350 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/qemu42/qemu-4.2.1/tcg/mips/
H A Dtcg-target.inc.c484 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
929 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
1273 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
1284 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0); in tcg_out_tlb_load()
1350 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/mips/
H A Dtcg-target.inc.c483 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
932 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
1273 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
1284 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0); in tcg_out_tlb_load()
1351 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/mips/
H A Dtcg-target.inc.c484 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, in tcg_out_opc_br() function
929 tcg_out_opc_br(s, b_opc, arg1, arg2); in tcg_out_brcond()
1273 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); in tcg_out_tlb_load()
1284 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0); in tcg_out_tlb_load()
1350 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); in tcg_out_qemu_ld_slow_path()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/
H A Dtcg-target.c.inc425 static void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, TCGReg rt, TCGReg rs)
841 tcg_out_opc_br(s, b_opc, arg1, arg2);
1181 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
1192 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0);
1260 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
/dports/emulators/qemu/qemu-6.2.0/tcg/mips/
H A Dtcg-target.c.inc425 static void tcg_out_opc_br(TCGContext *s, MIPSInsn opc, TCGReg rt, TCGReg rs)
841 tcg_out_opc_br(s, b_opc, arg1, arg2);
1181 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
1192 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0);
1260 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
/dports/emulators/qemu5/qemu-5.2.0/tcg/mips/
H A Dtcg-target.c.inc481 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,
926 tcg_out_opc_br(s, b_opc, arg1, arg2);
1270 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
1281 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0);
1347 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
/dports/emulators/qemu60/qemu-6.0.0/tcg/mips/
H A Dtcg-target.c.inc428 static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,
873 tcg_out_opc_br(s, b_opc, arg1, arg2);
1213 tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
1224 tcg_out_opc_br(s, OPC_BNE, addrh, TCG_TMP0);
1292 tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);