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/dports/cad/ghdl/ghdl-1.0.0/testsuite/gna/issue98/
H A Dtestsuite.sh5 analyze test_load.vhdl
6 elab test_load
8 if c_compiler_is_available && ghdl_has_feature test_load vpi; then
14 simulate test_load --vpi=./vpi1.vpi
H A Dtest_load.vhdl4 entity test_load is entity
14 end test_load;
16 architecture RTL of test_load is
/dports/cad/ghdl/ghdl-1.0.0/testsuite/gna/issue1228/
H A Dtestsuite.sh5 analyze test_load.vhdl
6 elab test_load
8 if c_compiler_is_available && ghdl_has_feature test_load vpi; then
14 simulate test_load --vpi=./vpi1.vpi
H A Dtest_load.vhdl4 entity test_load is entity
5 end test_load;
7 architecture RTL of test_load is
/dports/lang/cython-devel/cython-2b1e743/Cython/Compiler/Tests/
H A DTestUtilityLoad.py28 def test_load(self): member in TestUtilityLoader
58 def test_load(self): member in TestTempitaUtilityLoader
93 test_load = TestUtilityLoader.test_load variable in TestCythonUtilityLoader
94 test_load_tempita = TestTempitaUtilityLoader.test_load
/dports/math/py-cypari2/cypari2-2.1.2/venv/lib/python3.7/site-packages/Cython/Compiler/Tests/
H A DTestUtilityLoad.py31 def test_load(self):
65 def test_load(self):
100 test_load = TestUtilityLoader.test_load
101 test_load_tempita = TestTempitaUtilityLoader.test_load
/dports/lang/cython/Cython-0.29.24/Cython/Compiler/Tests/
H A DTestUtilityLoad.py31 def test_load(self): member in TestUtilityLoader
65 def test_load(self): member in TestTempitaUtilityLoader
100 test_load = TestUtilityLoader.test_load variable in TestCythonUtilityLoader
101 test_load_tempita = TestTempitaUtilityLoader.test_load
/dports/lang/cython/Cython-0.29.24/build/lib.dragonfly-6.3-DEVELOPMENT-x86_64-3.8/Cython/Compiler/Tests/
H A DTestUtilityLoad.py31 def test_load(self): member in TestUtilityLoader
65 def test_load(self): member in TestTempitaUtilityLoader
100 test_load = TestUtilityLoader.test_load variable in TestCythonUtilityLoader
101 test_load_tempita = TestTempitaUtilityLoader.test_load
/dports/lang/cython/stage/usr/local/lib/python3.8/site-packages/Cython/Compiler/Tests/
H A DTestUtilityLoad.py31 def test_load(self): member in TestUtilityLoader
65 def test_load(self): member in TestTempitaUtilityLoader
100 test_load = TestUtilityLoader.test_load variable in TestCythonUtilityLoader
101 test_load_tempita = TestTempitaUtilityLoader.test_load
/dports/x11-fonts/font-manager/font-manager-0.8.7/tests/
H A DTestFontConfig.vala44 add_test("Aliases::load ", test_load);
78 public void test_load () {
109 add_test("Directories::load ", test_load);
136 public void test_load () {
162 add_test("Reject::load ", test_load);
190 public void test_load () {
/dports/lang/swi-pl/swipl-8.2.3/packages/semweb/
H A Dtest_load.pl36 :- module(test_load,
37 [ test_load/0
59 test_load :- label
63 source_file(test_load, MyFile),
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
H A Dlower-globaladdr64-aix-asm.ll9 define zeroext i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
H A Dlower-globaladdr64-aix-asm.ll9 define zeroext i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr64-aix-asm.ll9 define zeroext i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/
H A Dlower-globaladdr64-aix-asm.ll9 define zeroext i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dlower-globaladdr32-aix-asm.ll9 define i32 @test_load() {
15 ; SMALL-LABEL: .test_load:{{$}}
20 ; LARGE-LABEL: .test_load:{{$}}

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