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Searched refs:test_vsrd (Results 1 – 25 of 32) sorted by relevance

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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/
H A Dvec_rotate_shift.ll23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
26 ; CHECK-LABEL: @test_vsrd
/dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/ppc32/
H A Dtest_isa_2_07_part1.c514 static void test_vsrd (void) in test_vsrd() function
862 { &test_vsrd , "vsrd", },
/dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/ppc64/
H A Dtest_isa_2_07_part1.c514 static void test_vsrd (void) in test_vsrd() function
862 { &test_vsrd , "vsrd", },
/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/ppc32/
H A Dtest_isa_2_07_part1.c514 static void test_vsrd (void) in test_vsrd() function
862 { &test_vsrd , "vsrd", },
/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/ppc64/
H A Dtest_isa_2_07_part1.c514 static void test_vsrd (void) in test_vsrd() function
862 { &test_vsrd , "vsrd", },
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {
/dports/devel/llvm11/llvm-11.0.1.src/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {
/dports/devel/llvm10/llvm-10.0.1.src/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll394 define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) {

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