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Searched refs:tlb_word2_i_value (Results 1 – 25 of 41) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
[all …]
H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c20 u32 tlb_word2_i_value; member
88 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
146 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
156 if (tlb_word2_i_value) in change_tlb()
174 u32 tlb_word2_i_value) in add_tlb_entry() argument
197 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
221 u32 tlb_word2_i_value) in program_tlb_addr() argument
226 tlb_i = tlb_word2_i_value; in program_tlb_addr()
321 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
327 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c59 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
82 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
158 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
181 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h44 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dtlb.c36 u32 tlb_word2_i_value; member
104 void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value) in change_tlb() argument
162 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in change_tlb()
172 if (tlb_word2_i_value) in change_tlb()
190 u32 tlb_word2_i_value) in add_tlb_entry() argument
213 TLB_WORD2_W_DISABLE | tlb_word2_i_value | in add_tlb_entry()
237 u32 tlb_word2_i_value) in program_tlb_addr() argument
242 tlb_i = tlb_word2_i_value; in program_tlb_addr()
337 void program_tlb(u64 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value) in program_tlb() argument
343 region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ in program_tlb()
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H A Decc.c75 unsigned long tlb_word2_i_value) in program_ecc_addr() argument
98 if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) { in program_ecc_addr()
155 void do_program_ecc(unsigned long tlb_word2_i_value) in do_program_ecc() argument
178 program_ecc_addr(0, memsize, tlb_word2_i_value); in do_program_ecc()
H A Decc.h61 void do_program_ecc(unsigned long tlb_word2_i_value);
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/lwmon5/
H A Dsdram.c92 u32 tlb_word2_i_value) in program_ecc() argument

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