| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/coregrind/ |
| H A D | m_stacktrace.c | 448 && VG_(use_FPO_info)( &uregs.xip, &uregs.xsp, &uregs.xbp,
469 uregs.xip = uregs.xip - 1;
1247 uregs.pc = uregs.pc - 1;
1296 uregs.ia, uregs.sp,uregs.fp);
1315 uregs.ia = uregs.ia - 1;
1331 uregs.ia = uregs.lr - 1;
1389 uregs.pc, uregs.sp, uregs.fp);
1401 i, uregs.pc, uregs.sp, uregs.ra);
1410 uregs.pc, uregs.sp, uregs.ra);
1472 uregs.pc = uregs.ra - 8;
[all …]
|
| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/coregrind/ |
| H A D | m_stacktrace.c | 448 && VG_(use_FPO_info)( &uregs.xip, &uregs.xsp, &uregs.xbp,
469 uregs.xip = uregs.xip - 1;
1247 uregs.pc = uregs.pc - 1;
1296 uregs.ia, uregs.sp,uregs.fp);
1315 uregs.ia = uregs.ia - 1;
1331 uregs.ia = uregs.lr - 1;
1389 uregs.pc, uregs.sp, uregs.fp);
1401 i, uregs.pc, uregs.sp, uregs.ra);
1410 uregs.pc, uregs.sp, uregs.ra);
1472 uregs.pc = uregs.ra - 8;
[all …]
|
| /dports/databases/percona57-server/percona-server-5.7.36-39/extra/coredumper/src/ |
| H A D | elfcore.h | 94 long uregs[18];
116 struct i386_regs uregs; member
167 (r) = (f).uregs; \
172 struct i386_regs uregs; member
231 (f).uregs.fs_base = (r).fs_base; \
232 (f).uregs.gs_base = (r).gs_base; \
233 (r) = (f).uregs; \
286 f.mips_regs.uregs[0] = MIPSREG(0); \
287 f.mips_regs.uregs[1] = MIPSREG(1); \
288 f.mips_regs.uregs[2] = MIPSREG(2); \
[all …]
|
| /dports/databases/percona57-pam-for-mysql/percona-server-5.7.36-39/extra/coredumper/src/ |
| H A D | elfcore.h | 94 long uregs[18];
116 struct i386_regs uregs; member
167 (r) = (f).uregs; \
172 struct i386_regs uregs; member
231 (f).uregs.fs_base = (r).fs_base; \
232 (f).uregs.gs_base = (r).gs_base; \
233 (r) = (f).uregs; \
286 f.mips_regs.uregs[0] = MIPSREG(0); \
287 f.mips_regs.uregs[1] = MIPSREG(1); \
288 f.mips_regs.uregs[2] = MIPSREG(2); \
[all …]
|
| /dports/databases/percona57-client/percona-server-5.7.36-39/extra/coredumper/src/ |
| H A D | elfcore.h | 94 long uregs[18];
116 struct i386_regs uregs; member
167 (r) = (f).uregs; \
172 struct i386_regs uregs; member
231 (f).uregs.fs_base = (r).fs_base; \
232 (f).uregs.gs_base = (r).gs_base; \
233 (r) = (f).uregs; \
286 f.mips_regs.uregs[0] = MIPSREG(0); \
287 f.mips_regs.uregs[1] = MIPSREG(1); \
288 f.mips_regs.uregs[2] = MIPSREG(2); \
[all …]
|
| /dports/games/openlierox/OpenLieroX/libs/coredumper/src/ |
| H A D | elfcore.h | 97 long uregs[18];
119 struct i386_regs uregs; member
167 (r) = (f).uregs; \
172 struct i386_regs uregs; member
228 (f).uregs.fs_base = (r).fs_base; \
229 (f).uregs.gs_base = (r).gs_base; \
230 (r) = (f).uregs; \
249 f.arm.uregs[16] = 0; \
253 f.arm.uregs[17] = cpsr; \
261 long fps = (f).arm.uregs[16]; \
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/tcmalloc/chromium/src/base/ |
| H A D | elfcore.h | 98 long uregs[18];
135 struct i386_regs uregs; member
183 (r) = (f).uregs; \
188 struct i386_regs uregs; member
244 (f).uregs.fs_base = (r).fs_base; \
245 (f).uregs.gs_base = (r).gs_base; \
246 (r) = (f).uregs; \
265 f.arm.uregs[16] = 0; \
269 f.arm.uregs[17] = cpsr; \
277 long fps = (f).arm.uregs[16]; \
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/tcmalloc/vendor/src/base/ |
| H A D | elfcore.h | 98 long uregs[18];
135 struct i386_regs uregs; member
183 (r) = (f).uregs; \
188 struct i386_regs uregs; member
244 (f).uregs.fs_base = (r).fs_base; \
245 (f).uregs.gs_base = (r).gs_base; \
246 (r) = (f).uregs; \
265 f.arm.uregs[16] = 0; \
269 f.arm.uregs[17] = cpsr; \
277 long fps = (f).arm.uregs[16]; \
[all …]
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/gperftools-2.5/src/base/ |
| H A D | elfcore.h | 98 long uregs[18];
135 struct i386_regs uregs; member
183 (r) = (f).uregs; \
188 struct i386_regs uregs; member
244 (f).uregs.fs_base = (r).fs_base; \
245 (f).uregs.gs_base = (r).gs_base; \
246 (r) = (f).uregs; \
265 f.arm.uregs[16] = 0; \
269 f.arm.uregs[17] = cpsr; \
277 long fps = (f).arm.uregs[16]; \
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/common/ |
| H A D | cmd_tsi148.c | 43 TSI148 *uregs; member
81 dev->uregs = (TSI148 *)val; in tsi148_init()
83 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
87 readl(&dev->uregs->pci_id)); in tsi148_init()
90 readl(&dev->uregs->pci_id)); in tsi148_init()
97 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
130 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
132 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
222 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
315 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/cmd/ |
| H A D | tsi148.c | 26 TSI148 *uregs; member
63 dev->uregs = (TSI148 *)val; in tsi148_init()
65 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
69 readl(&dev->uregs->pci_id)); in tsi148_init()
72 readl(&dev->uregs->pci_id)); in tsi148_init()
79 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
112 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
114 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
202 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
295 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/common/ |
| H A D | cmd_tsi148.c | 43 TSI148 *uregs; member
81 dev->uregs = (TSI148 *)val; in tsi148_init()
83 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
87 readl(&dev->uregs->pci_id)); in tsi148_init()
90 readl(&dev->uregs->pci_id)); in tsi148_init()
97 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
130 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
132 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
222 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
315 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/common/ |
| H A D | cmd_tsi148.c | 43 TSI148 *uregs; member
81 dev->uregs = (TSI148 *)val; in tsi148_init()
83 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
87 readl(&dev->uregs->pci_id)); in tsi148_init()
90 readl(&dev->uregs->pci_id)); in tsi148_init()
97 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
130 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
132 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
222 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
315 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/common/ |
| H A D | cmd_tsi148.c | 43 TSI148 *uregs; member
81 dev->uregs = (TSI148 *)val; in tsi148_init()
83 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
87 readl(&dev->uregs->pci_id)); in tsi148_init()
90 readl(&dev->uregs->pci_id)); in tsi148_init()
97 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
130 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
132 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
222 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
315 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/cmd/ |
| H A D | tsi148.c | 27 TSI148 *uregs; member
64 dev->uregs = (TSI148 *)val; in tsi148_init()
66 debug("Tsi148: Base : %p\n", dev->uregs); in tsi148_init()
70 readl(&dev->uregs->pci_id)); in tsi148_init()
73 readl(&dev->uregs->pci_id)); in tsi148_init()
80 dev->pci_bs = readl(&dev->uregs->pci_mbarl); in tsi148_init()
113 val = __raw_readl(&dev->uregs->vstat); in tsi148_init()
115 __raw_writel(val, &dev->uregs->vstat); in tsi148_init()
203 &dev->uregs->outbound[i].otsau); in tsi148_pci_slave_window()
296 &dev->uregs->inbound[i].itsau); in tsi148_vme_slave_window()
[all …]
|