| /dports/devel/openwince-include/include-0.4.2/arm/sa11x0/ |
| H A D | uart.h | 56 uint32_t utcr0; member
73 #define UTCR0 UART_pointer->utcr0
84 #define Ser1UTCR0 UART1_pointer->utcr0
94 #define Ser2UTCR0 UART2_pointer->utcr0
105 #define Ser3UTCR0 UART3_pointer->utcr0
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/tty/serial/ |
| H A D | sa1100.c | 431 utcr0 = UTCR0_DSS; in sa1100_set_termios()
433 utcr0 = 0; in sa1100_set_termios()
436 utcr0 |= UTCR0_SBS; in sa1100_set_termios()
438 utcr0 |= UTCR0_PE; in sa1100_set_termios()
440 utcr0 |= UTCR0_OES; in sa1100_set_termios()
499 UART_PUT_UTCR0(sport, utcr0); in sa1100_set_termios()
749 unsigned int utcr0, quot; in sa1100_console_get_options() local
751 utcr0 = UART_GET_UTCR0(sport); in sa1100_console_get_options()
754 if (utcr0 & UTCR0_PE) { in sa1100_console_get_options()
755 if (utcr0 & UTCR0_OES) in sa1100_console_get_options()
[all …]
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/tty/serial/ |
| H A D | sa1100.c | 431 utcr0 = UTCR0_DSS; in sa1100_set_termios()
433 utcr0 = 0; in sa1100_set_termios()
436 utcr0 |= UTCR0_SBS; in sa1100_set_termios()
438 utcr0 |= UTCR0_PE; in sa1100_set_termios()
440 utcr0 |= UTCR0_OES; in sa1100_set_termios()
499 UART_PUT_UTCR0(sport, utcr0); in sa1100_set_termios()
749 unsigned int utcr0, quot; in sa1100_console_get_options() local
751 utcr0 = UART_GET_UTCR0(sport); in sa1100_console_get_options()
754 if (utcr0 & UTCR0_PE) { in sa1100_console_get_options()
755 if (utcr0 & UTCR0_OES) in sa1100_console_get_options()
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/tty/serial/ |
| H A D | sa1100.c | 431 utcr0 = UTCR0_DSS; in sa1100_set_termios()
433 utcr0 = 0; in sa1100_set_termios()
436 utcr0 |= UTCR0_SBS; in sa1100_set_termios()
438 utcr0 |= UTCR0_PE; in sa1100_set_termios()
440 utcr0 |= UTCR0_OES; in sa1100_set_termios()
499 UART_PUT_UTCR0(sport, utcr0); in sa1100_set_termios()
749 unsigned int utcr0, quot; in sa1100_console_get_options() local
751 utcr0 = UART_GET_UTCR0(sport); in sa1100_console_get_options()
754 if (utcr0 & UTCR0_PE) { in sa1100_console_get_options()
755 if (utcr0 & UTCR0_OES) in sa1100_console_get_options()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/hw/arm/ |
| H A D | strongarm.c | 925 uint8_t utcr0; member
1005 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1008 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1016 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1022 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1138 return s->utcr0; in strongarm_uart_read()
1179 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1263 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1303 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu/qemu-6.2.0/hw/arm/ |
| H A D | strongarm.c | 925 uint8_t utcr0; member
1005 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1008 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1016 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1022 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1138 return s->utcr0; in strongarm_uart_read()
1179 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1264 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1304 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu60/qemu-6.0.0/hw/arm/ |
| H A D | strongarm.c | 926 uint8_t utcr0; member
1006 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1009 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1017 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1023 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1139 return s->utcr0; in strongarm_uart_read()
1180 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1265 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1305 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/ |
| H A D | strongarm.c | 921 uint8_t utcr0; member
1001 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1004 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1012 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1018 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1134 return s->utcr0; in strongarm_uart_read()
1175 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1259 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1299 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu5/qemu-5.2.0/hw/arm/ |
| H A D | strongarm.c | 925 uint8_t utcr0; member
1005 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1008 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1016 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1022 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1138 return s->utcr0; in strongarm_uart_read()
1179 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1264 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1304 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/ |
| H A D | strongarm.c | 925 uint8_t utcr0; member
1005 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1008 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1016 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1022 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1138 return s->utcr0; in strongarm_uart_read()
1179 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1263 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1303 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/ |
| H A D | strongarm.c | 930 uint8_t utcr0; member
1010 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1013 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1021 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1027 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1143 return s->utcr0; in strongarm_uart_read()
1184 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1269 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1309 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/ |
| H A D | strongarm.c | 930 uint8_t utcr0; member
1010 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1013 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1021 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1027 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1143 return s->utcr0; in strongarm_uart_read()
1184 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1269 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1309 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/ |
| H A D | strongarm.c | 925 uint8_t utcr0; member
1005 if (s->utcr0 & UTCR0_PE) { in strongarm_uart_update_parameters()
1008 if (s->utcr0 & UTCR0_OES) { in strongarm_uart_update_parameters()
1016 if (s->utcr0 & UTCR0_SBS) { in strongarm_uart_update_parameters()
1022 data_bits = (s->utcr0 & UTCR0_DSS) ? 8 : 7; in strongarm_uart_update_parameters()
1138 return s->utcr0; in strongarm_uart_read()
1179 s->utcr0 = value & 0x7f; in strongarm_uart_write()
1264 s->utcr0 = UTCR0_DSS; /* 8 data, no parity */ in strongarm_uart_reset()
1304 VMSTATE_UINT8(utcr0, StrongARMUARTState),
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| /dports/comms/lirc/lirc-0.9.0/drivers/lirc_sir/ |
| H A D | lirc_sir.c | 118 unsigned char utcr0; member
871 sr.utcr0 = Ser2UTCR0; in init_hardware()
1009 Ser2UTCR0 = sr.utcr0; in drop_hardware()
|