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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s11 ds_add_u32 v255, v254
14 ds_add_u32 v0, v254
107 ds_sub_u32 v255, v254
110 ds_sub_u32 v0, v254
206 ds_rsub_u32 v0, v254
302 ds_inc_u32 v0, v254
398 ds_dec_u32 v0, v254
494 ds_min_i32 v0, v254
590 ds_max_i32 v0, v254
686 ds_min_u32 v0, v254
[all …]
H A Dgfx10_asm_mimg.s70 image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D
71 ; GFX10: image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D ; encoding: […
73 image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D
74 ; GFX10: image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D ; encod…
76 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D
77 ; GFX10: image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D ; encod…
79 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_CUBE
82 image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY
83 ; GFX10: image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY ; encod…
85 image_load_mip v255, [v254, v255, v253, v255], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_ARRAY
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dreserve-vgpr-for-sgpr-spill.ll49 ,~{v250},~{v251},~{v252},~{v253},~{v254}" () #0
55 ; GCN: buffer_store_dword v254, off, s[0:3], s32
56 ; GCN: v_writelane_b32 v254, s33, 2
57 ; GCN: v_writelane_b32 v254, s30, 0
58 ; GCN: v_writelane_b32 v254, s31, 1
60 ; GCN: v_readlane_b32 s30, v254, 0
61 ; GCN: v_readlane_b32 s31, v254, 1
62 ; GCN: v_readlane_b32 s33, v254, 2
102 ; GCN: v_writelane_b32 v254, s4, 2
103 ; GCN: v_readlane_b32 s4, v254, 2
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]
H A Dgfx10_asm_mimg.s70 image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D
71 ; GFX10: image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D ; encoding: […
73 image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D
74 ; GFX10: image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D ; encod…
76 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D
77 ; GFX10: image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D ; encod…
79 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_CUBE
82 image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY
83 ; GFX10: image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY ; encod…
85 image_load_mip v255, [v254, v255, v253, v255], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_ARRAY
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]
H A Dgfx10_asm_mimg.s70 image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D
71 ; GFX10: image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D ; encoding: […
73 image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D
74 ; GFX10: image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D ; encod…
76 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D
77 ; GFX10: image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D ; encod…
79 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_CUBE
82 image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY
83 ; GFX10: image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY ; encod…
85 image_load_mip v255, [v254, v255, v253, v255], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_ARRAY
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]
H A Dgfx10_asm_mimg.s70 image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D
71 ; GFX10: image_load_mip v[253:255], [v255, v254], s[0:7] dmask:0xe dim:SQ_RSRC_IMG_1D ; encoding: […
73 image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D
74 ; GFX10: image_load_mip v[254:255], [v254, v255, v253], s[0:7] dmask:0xc dim:SQ_RSRC_IMG_2D ; encod…
76 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D
77 ; GFX10: image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_3D ; encod…
79 image_load_mip v255, [v254, v255, v253, v252], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_CUBE
82 image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY
83 ; GFX10: image_load_mip v255, [v254, v255, v253], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D_ARRAY ; encod…
85 image_load_mip v255, [v254, v255, v253, v255], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D_ARRAY
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_all.s13 ds_add_u32 v255, v254
16 ds_add_u32 v0, v254
109 ds_sub_u32 v255, v254
112 ds_sub_u32 v0, v254
208 ds_rsub_u32 v0, v254
304 ds_inc_u32 v0, v254
400 ds_dec_u32 v0, v254
496 ds_min_i32 v0, v254
592 ds_max_i32 v0, v254
688 ds_min_u32 v0, v254
[all …]

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