/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/PPC/ |
H A D | PPCInstrQPX.td | 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 872 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 904 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 906 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 913 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 915 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 917 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
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/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/PPC/ |
H A D | PPCInstrQPX.td | 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 872 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 904 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 906 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 913 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 915 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 917 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
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/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/PPC/ |
H A D | PPCInstrQPX.td | 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 872 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 904 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 906 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 913 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 915 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 917 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 172 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 194 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 869 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 901 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 903 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 910 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 912 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 914 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 870 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 902 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 904 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 911 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 913 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 915 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/PowerPC/ |
H A D | PPCInstrQPX.td | 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>; 173 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, v4f64:$FRB))]>; 195 [(set v4f64:$FRT, (fma v4f64:$FRA, v4f64:$FRC, 872 def : Pat<(int_ppc_qpx_qvfperm v4f64:$A, v4f64:$B, v4f64:$C), 904 def : Pat<(fma (fneg v4f64:$A), v4f64:$C, v4f64:$B), 906 def : Pat<(fma v4f64:$A, (fneg v4f64:$C), v4f64:$B), 913 def : Pat<(int_ppc_qpx_qvfmadd v4f64:$A, v4f64:$B, v4f64:$C), 915 def : Pat<(int_ppc_qpx_qvfnmadd v4f64:$A, v4f64:$B, v4f64:$C), 917 def : Pat<(int_ppc_qpx_qvfmsub v4f64:$A, v4f64:$B, v4f64:$C), [all …]
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
H A D | vec-strict-256.ll | 22 declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata) 24 declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata) 26 declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata) 125 %ret = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( 150 %ret = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( 162 %ret = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( 206 %res = call <4 x double> @llvm.experimental.constrained.ceil.v4f64( 226 %res = call <4 x double> @llvm.experimental.constrained.floor.v4f64( 247 %res = call <4 x double> @llvm.experimental.constrained.trunc.v4f64( 269 %res = call <4 x double> @llvm.experimental.constrained.rint.v4f64( [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/ |
H A D | vecreduce-propagate-sd-flags.ll | 5 ; This test check that when v4f64 gets broken down to two v2f64 it maintains 8 ; CHECK: Legalizing node: [[VFOUR:t.*]]: v4f64 = BUILD_VECTOR 9 ; CHECK-NEXT: Analyzing result type: v4f64 10 ; CHECK-NEXT: Split node result: [[VFOUR]]: v4f64 = BUILD_VECTOR 27 %4 = call nnan reassoc double @llvm.vector.reduce.fmax.v4f64(<4 x double> %3) 31 declare double @llvm.vector.reduce.fmax.v4f64(<4 x double>)
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/ |
H A D | vecreduce-propagate-sd-flags.ll | 5 ; This test check that when v4f64 gets broken down to two v2f64 it maintains 8 ; CHECK: Legalizing node: [[VFOUR:t.*]]: v4f64 = BUILD_VECTOR 9 ; CHECK-NEXT: Analyzing result type: v4f64 10 ; CHECK-NEXT: Split node result: [[VFOUR]]: v4f64 = BUILD_VECTOR 27 %4 = call nnan reassoc double @llvm.experimental.vector.reduce.fmax.v4f64(<4 x double> %3) 31 declare double @llvm.experimental.vector.reduce.fmax.v4f64(<4 x double>)
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