/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 127 v64f16 = 71, // 64 x f16 enumerator 418 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 561 case v64f16: in getVectorElementType() 639 case v64f16: in getVectorNumElements() 918 case v64f16: in getSizeInBits() 1122 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/llvm11/llvm-11.0.1.src/include/llvm/Support/ |
H A D | MachineValueType.h | 126 v64f16 = 71, // 64 x f16 enumerator 402 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 545 case v64f16: in getVectorElementType() 623 case v64f16: in getVectorNumElements() 897 case v64f16: in getSizeInBits() 1086 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 129 v64f16 = 74, // 64 x f16 enumerator 410 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 586 case v64f16: in getVectorElementType() 672 case v64f16: in getVectorNumElements() 947 case v64f16: in getSizeInBits() 1181 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 129 v64f16 = 74, // 64 x f16 enumerator 410 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 586 case v64f16: in getVectorElementType() 672 case v64f16: in getVectorNumElements() 947 case v64f16: in getSizeInBits() 1181 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 129 v64f16 = 74, // 64 x f16 enumerator 410 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 586 case v64f16: in getVectorElementType() 672 case v64f16: in getVectorNumElements() 947 case v64f16: in getSizeInBits() 1181 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 140 v64f16 = 82, // 64 x f16 enumerator 437 SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 || in is1024BitVector() 622 case v64f16: in getVectorElementType() 721 case v64f16: in getVectorMinNumElements() 1013 case v64f16: in getSizeInBits() 1261 if (NumElements == 64) return MVT::v64f16; in getVectorVT()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1325 %res = call <64 x half> @llvm.trunc.v64f16(<64 x half> %op) 1511 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1530 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1549 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1568 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1587 declare <64 x half> @llvm.round.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1325 %res = call <64 x half> @llvm.trunc.v64f16(<64 x half> %op) 1511 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1530 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1549 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1568 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1587 declare <64 x half> @llvm.round.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1325 %res = call <64 x half> @llvm.trunc.v64f16(<64 x half> %op) 1511 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1530 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1549 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1568 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1587 declare <64 x half> @llvm.round.v64f16(<64 x half>) [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1758 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1777 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1796 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1815 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1834 declare <64 x half> @llvm.round.v64f16(<64 x half>) 1853 declare <64 x half> @llvm.roundeven.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1758 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1777 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1796 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1815 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1834 declare <64 x half> @llvm.round.v64f16(<64 x half>) 1853 declare <64 x half> @llvm.roundeven.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1758 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1777 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1796 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1815 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1834 declare <64 x half> @llvm.round.v64f16(<64 x half>) 1853 declare <64 x half> @llvm.roundeven.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1758 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1777 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1796 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1815 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1834 declare <64 x half> @llvm.round.v64f16(<64 x half>) 1853 declare <64 x half> @llvm.roundeven.v64f16(<64 x half>) [all …]
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H A D | sve-fixed-length-fp-reduce.ll | 85 %res = call half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 314 %res = call fast half @llvm.vector.reduce.fadd.v64f16(half %start, <64 x half> %op) 546 %res = call half @llvm.vector.reduce.fmax.v64f16(<64 x half> %op) 763 %res = call half @llvm.vector.reduce.fmin.v64f16(<64 x half> %op) 926 declare half @llvm.vector.reduce.fadd.v64f16(half, <64 x half>) 947 declare half @llvm.vector.reduce.fmax.v64f16(<64 x half>) 968 declare half @llvm.vector.reduce.fmin.v64f16(<64 x half>)
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | sve-fixed-length-fp-rounding.ll | 90 %res = call <64 x half> @llvm.ceil.v64f16(<64 x half> %op) 337 %res = call <64 x half> @llvm.floor.v64f16(<64 x half> %op) 831 %res = call <64 x half> @llvm.rint.v64f16(<64 x half> %op) 1078 %res = call <64 x half> @llvm.round.v64f16(<64 x half> %op) 1758 declare <64 x half> @llvm.ceil.v64f16(<64 x half>) 1777 declare <64 x half> @llvm.floor.v64f16(<64 x half>) 1796 declare <64 x half> @llvm.nearbyint.v64f16(<64 x half>) 1815 declare <64 x half> @llvm.rint.v64f16(<64 x half>) 1834 declare <64 x half> @llvm.round.v64f16(<64 x half>) 1853 declare <64 x half> @llvm.roundeven.v64f16(<64 x half>) [all …]
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