/dports/sysutils/vector/lucet-d4fc14a03bdb99ac83173d27fddf1aca48412a86/wasmtime/cranelift/filetests/filetests/isa/x86/ |
H A D | legalize-byte-ops-i8.clif | 11 v99 = stack_addr.i64 ss0 16 store v2, v99 18 store v3, v99 20 store v4, v99 22 store v5, v99 24 store v6, v99 26 store v7, v99 28 store v8, v99 30 store v9, v99 32 store v10, v99 [all …]
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H A D | relax_branch.clif | 111 [DynRexOp1umr#89,%rcx] v99 = copy v81 114 @00a4 [RexOp1rmov#89] regmove v99, %rcx -> %rsi 115 @00a4 [Op1jmpd#e9] jump block3(v100, v99); bin: e9 ffffff2d
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H A D | legalize-i128.clif | 15 ; nextln: $(v99=$V), $(v14=$V) = x86_umulx $v1_lsb, $v2_lsb
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/dports/graphics/nip2/nip2-8.7.1/src/ |
H A D | heap.h | 127 void *v99 = (void*)(V);\ 130 (N)->body.ptrs.left = v99;\ 134 void *v99 = (void*)(V);\ 137 (N)->body.ptrs.right = v99;\ 180 void *v99 = PEGETVAL(PEfrom);\ 183 *((PEto)->ele) = v99;\ 190 *((PE)->ele) = v99;\ 198 void *v99 = PEGETVAL(PE);\ 201 (N)->body.ptrs.left = v99;\ 205 void *v99 = PEGETVAL(PE);\ [all …]
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/dports/security/tor/tor-0.4.6.8/src/test/ |
H A D | test_containers.c | 54 char *v99 = tor_strdup("v99"); in test_container_smartlist_basic() local 85 tt_assert(!smartlist_contains(sl, v99)); in test_container_smartlist_basic() 95 tor_free(v99); in test_container_smartlist_basic() 877 char *v99 = tor_strdup("v99"); in test_container_strmap() local 890 v = strmap_set(map, "K1", v99); in test_container_strmap() 896 tt_ptr_op(v,OP_EQ, v99); in test_container_strmap() 965 tor_free(v99); in test_container_strmap() 1151 char *v99 = tor_strdup("99"); in test_container_fp_pair_map() local 1178 v = fp_pair_map_set(map, &fp1, v99); in test_container_fp_pair_map() 1184 tt_ptr_op(v, OP_EQ, v99); in test_container_fp_pair_map() [all …]
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/dports/security/tor-devel/tor-0.4.7.2-alpha/src/test/ |
H A D | test_containers.c | 54 char *v99 = tor_strdup("v99"); in test_container_smartlist_basic() local 85 tt_assert(!smartlist_contains(sl, v99)); in test_container_smartlist_basic() 95 tor_free(v99); in test_container_smartlist_basic() 877 char *v99 = tor_strdup("v99"); in test_container_strmap() local 890 v = strmap_set(map, "K1", v99); in test_container_strmap() 896 tt_ptr_op(v,OP_EQ, v99); in test_container_strmap() 965 tor_free(v99); in test_container_strmap() 1151 char *v99 = tor_strdup("99"); in test_container_fp_pair_map() local 1178 v = fp_pair_map_set(map, &fp1, v99); in test_container_fp_pair_map() 1184 tt_ptr_op(v, OP_EQ, v99); in test_container_fp_pair_map() [all …]
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/dports/sysutils/vector/lucet-d4fc14a03bdb99ac83173d27fddf1aca48412a86/wasmtime/cranelift/filetests/filetests/regalloc/ |
H A D | solver-fixedconflict-var-3.clif | 123 v99 -> v351 125 v359, v360 = x86_sdivmodx v36, v358, v99
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/dports/www/firefox/firefox-99.0/third_party/jpeg-xl/lib/jxl/ |
H A D | fast_dct16-inl.h | 126 int16x8_t v99 = vmlaq_n_s16(v99_tmp, v98, 2); in FastIDCT() local 128 int16x8_t v101 = vaddq_s16(v99, v100); in FastIDCT() 137 int16x8_t v109 = vsubq_s16(v100, v99); in FastIDCT()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 212 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 212 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 212 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 212 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | reserve-vgpr-for-sgpr-spill.ll | 33 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 78 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 120 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 169 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} 212 ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
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/dports/www/drupal8/drupal-8.9.20/core/themes/claro/templates/admin/ |
H A D | indentation.html.twig | 33 d="M12.5,12 v99"
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/dports/www/drupal9/drupal-9.2.10/core/themes/claro/templates/admin/ |
H A D | indentation.html.twig | 33 d="M12.5,12 v99"
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/ |
H A D | swp-disable-Os.ll | 120 %v99 = phi i32 [ %v1, %b0 ], [ %v95, %b3 ] 122 %v101 = or i32 %v100, %v99
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