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Searched refs:v_add_u32_e64 (Results 1 – 25 of 203) sorted by relevance

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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll78 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
232 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
233 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
265 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
266 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
267 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
303 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
304 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
305 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
306 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
H A Dwwm-reserved.ll19 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
27 ; GFX9-O0-DAG: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
54 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
69 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
95 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
124 ; GFX9-O0: v_add_u32_e64 v1, v1, v2
213 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
248 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
263 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
289 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll78 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
232 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
233 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
265 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
266 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
267 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
303 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
304 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
305 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
306 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
H A Dwwm-reserved.ll19 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
27 ; GFX9-O0-DAG: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
54 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
69 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
95 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
124 ; GFX9-O0: v_add_u32_e64 v1, v1, v2
213 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
248 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
263 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
289 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Duaddsat.ll78 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
232 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
233 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
265 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
266 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
267 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
303 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
304 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
305 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
306 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
H A Dwwm-reserved.ll19 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
27 ; GFX9-O0-DAG: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
54 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
69 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
95 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
124 ; GFX9-O0: v_add_u32_e64 v1, v1, v2
213 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
248 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
263 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
289 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll78 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
232 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
233 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
265 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
266 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
267 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
303 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
304 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
305 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
306 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
H A Dwwm-reserved.ll19 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
27 ; GFX9-O0-DAG: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
54 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
69 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
95 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
124 ; GFX9-O0: v_add_u32_e64 v1, v1, v2
213 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
248 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
263 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
289 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll78 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
232 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
233 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
265 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
266 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
267 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
303 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
304 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
305 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
306 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
H A Dwwm-reserved.ll19 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
27 ; GFX9-O0-DAG: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
54 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
69 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
95 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
124 ; GFX9-O0: v_add_u32_e64 v1, v1, v2
213 ; GFX9-O0-DAG: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
248 ; GFX9-O0: v_add_u32_e64 v[[FIRST_ADD:[0-9]+]], v{{[0-9]+}}, v[[FIRST_MOV]]
263 ; GFX9-O0: v_add_u32_e64 v[[SECOND_ADD:[0-9]+]], v{{[0-9]+}}, v[[SECOND_MOV]]
289 ; GFX9-O0: v_add_u32_e64 v1, v0, v0
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll82 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
236 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
237 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
269 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
270 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
271 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
307 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
308 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
309 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
310 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll82 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
236 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
237 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
269 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
270 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
271 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
307 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
308 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
309 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
310 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Duaddsat.ll82 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
236 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
237 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
269 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp
270 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp
271 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp
307 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp
308 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp
309 ; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp
310 ; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll712 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
755 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
790 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
821 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
849 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
876 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
910 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
911 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
950 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
951 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
H A Dudivrem.ll168 ; GFX8-NEXT: v_add_u32_e64 v1, s[0:1], v1, v2
169 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v5
170 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v8
175 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
177 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
180 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v8, v2
183 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v7
185 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
187 ; GFX8-NEXT: v_add_u32_e64 v7, s[0:1], v7, v8
188 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll712 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
755 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
790 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
821 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
849 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
876 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
910 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
911 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
950 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
951 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
H A Dudivrem.ll168 ; GFX8-NEXT: v_add_u32_e64 v1, s[0:1], v1, v2
169 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v5
170 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v8
175 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
177 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
180 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v8, v2
183 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v7
185 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
187 ; GFX8-NEXT: v_add_u32_e64 v7, s[0:1], v7, v8
188 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll712 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
755 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
790 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
821 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
849 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
876 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
910 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
911 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
950 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
951 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
H A Dudivrem.ll168 ; GFX8-NEXT: v_add_u32_e64 v1, s[0:1], v1, v2
169 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v5
170 ; GFX8-NEXT: v_add_u32_e64 v4, s[0:1], v4, v8
175 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
177 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
180 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v8, v2
182 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v7
184 ; GFX8-NEXT: v_add_u32_e64 v5, s[0:1], v5, v8
186 ; GFX8-NEXT: v_add_u32_e64 v7, s[0:1], v7, v8
188 ; GFX8-NEXT: v_add_u32_e64 v2, s[0:1], v5, v2
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll712 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
755 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
790 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
821 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
849 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
876 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
910 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
911 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
950 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
951 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll712 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
755 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
790 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
821 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
849 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
876 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
910 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
911 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
950 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
951 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll724 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
769 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
805 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
838 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
867 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
895 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
930 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
931 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
973 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
974 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll716 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
760 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
795 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
827 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
855 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
882 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
916 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
917 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
958 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
959 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Duaddsat.ll716 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
760 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
795 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp
827 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
855 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
882 ; GFX9-NEXT: v_add_u32_e64 v0, v0, s0 clamp
916 ; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp
917 ; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp
958 ; GFX9-NEXT: v_add_u32_e64 v0, s0, v0 clamp
959 ; GFX9-NEXT: v_add_u32_e64 v1, s1, v1 clamp
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/
H A Damdgpu_no_merge_comments-O0.s21 v_add_u32_e64 v1, v0, v0

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