/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 326 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 331 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 332 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 326 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 331 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 332 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 18 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 331 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 337 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 338 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 325 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 330 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 331 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 325 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 330 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 331 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 326 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 331 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 332 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 326 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 331 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 332 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 325 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 330 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 331 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 326 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 331 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 332 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i64-opts.ll | 235 ; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31 250 ; GCN-NOT: v_lshl_b64 266 ; GCN-NOT: v_lshl_b64 281 ; GCN: v_lshl_b64 295 ; GCN: v_lshl_b64 307 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 3 308 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4 309 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 5 310 ; GCN-DAG: v_lshl_b64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 6
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H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 135 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 325 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 330 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 331 ; GCN-NEXT: v_lshl_b64 v[4:5], v[4:5], v12 [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[9:10], v[2:3], v9 88 ; GCN-NEXT: v_lshl_b64 v[2:3], v[2:3], 17 90 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], 17 113 ; GCN-NEXT: v_lshl_b64 v[4:5], v[2:3], 31 131 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v3 137 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 134 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 139 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 306 ; GCN-NEXT: v_lshl_b64 v[16:17], v[2:3], v8 330 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 335 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 [all …]
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H A D | bitreverse.ll | 277 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 4 287 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 2 298 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 402 ; SI-NEXT: v_lshl_b64 v[2:3], v[0:1], 8 426 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 4 434 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 2 443 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 1 592 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 4 609 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], 2 611 ; SI-NEXT: v_lshl_b64 v[4:5], v[4:5], 4 [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | shift-i128.ll | 9 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 15 ; GCN-NEXT: v_lshl_b64 v[5:6], v[0:1], v5 17 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v4 35 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 61 ; GCN-NEXT: v_lshl_b64 v[7:8], v[2:3], v7 134 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v1 139 ; GCN-NEXT: v_lshl_b64 v[0:1], 17, v0 306 ; GCN-NEXT: v_lshl_b64 v[16:17], v[2:3], v8 330 ; GCN-NEXT: v_lshl_b64 v[9:10], v[4:5], v9 335 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v8 [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | shift-i128.ll | 8 ; GCN-NEXT: v_lshl_b64 v[5:6], v[2:3], v4 11 ; GCN-NEXT: v_lshl_b64 v[7:8], v[0:1], v4 13 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], v11 37 ; GCN-NEXT: v_lshl_b64 v[9:10], v[2:3], v9 67 ; GCN-NEXT: v_lshl_b64 v[9:10], v[2:3], v10 88 ; GCN-NEXT: v_lshl_b64 v[2:3], v[2:3], 17 91 ; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], 17 113 ; GCN-NEXT: v_lshl_b64 v[4:5], v[2:3], 31 130 ; GCN-NEXT: v_lshl_b64 v[4:5], 17, v0 132 ; GCN-NEXT: v_lshl_b64 v[6:7], 17, v3 [all …]
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