/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/lang/clover/mesa-21.3.6/src/amd/compiler/tests/ |
H A D | test_sdwa.cpp | 60 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 75 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]); 76 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]); 441 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 446 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 451 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 456 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 461 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 466 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); 472 val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]); [all …]
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
H A D | fmul.ll | 6 ; GCN: v_mul_f32 17 ; GCN: v_mul_f32 18 ; GCN: v_mul_f32 30 ; GCN: v_mul_f32 31 ; GCN: v_mul_f32 32 ; GCN: v_mul_f32 33 ; GCN: v_mul_f32 49 ; GCN: v_mul_f32 60 ; GCN: v_mul_f32 74 ; GCN: v_mul_f32 [all …]
|