/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 143 ; GFX10-NEXT: v_sub_f32_e64 v0, s2, s3 153 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 160 ; GFX10-NEXT: v_sub_f32_e64 v0, |v0|, v1 171 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 178 ; GFX10-NEXT: v_sub_f32_e64 v0, v0, |v1| 189 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1 196 ; GFX10-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 143 ; GFX10-NEXT: v_sub_f32_e64 v0, s2, s3 153 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 160 ; GFX10-NEXT: v_sub_f32_e64 v0, |v0|, v1 171 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 178 ; GFX10-NEXT: v_sub_f32_e64 v0, v0, |v1| 189 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1 196 ; GFX10-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 143 ; GFX10-NEXT: v_sub_f32_e64 v0, s2, s3 153 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 160 ; GFX10-NEXT: v_sub_f32_e64 v0, |v0|, v1 171 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 178 ; GFX10-NEXT: v_sub_f32_e64 v0, v0, |v1| 189 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1 196 ; GFX10-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 143 ; GFX10-NEXT: v_sub_f32_e64 v0, s2, s3 153 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 160 ; GFX10-NEXT: v_sub_f32_e64 v0, |v0|, v1 171 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 178 ; GFX10-NEXT: v_sub_f32_e64 v0, v0, |v1| 189 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1 196 ; GFX10-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 143 ; GFX10-NEXT: v_sub_f32_e64 v0, s2, s3 153 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 160 ; GFX10-NEXT: v_sub_f32_e64 v0, |v0|, v1 171 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 178 ; GFX10-NEXT: v_sub_f32_e64 v0, v0, |v1| 189 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1 196 ; GFX10-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fmed3.ll | 259 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 294 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 312 ; GFX9-NEXT: v_sub_f32_e64 v3, s2, |v3| 377 ; SI-NEXT: v_sub_f32_e64 v2, s2, |v2| 378 ; SI-NEXT: v_sub_f32_e64 v3, s2, |v3| 379 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 413 ; VI-NEXT: v_sub_f32_e64 v4, s2, |v7| 414 ; VI-NEXT: v_sub_f32_e64 v2, s2, |v2| 415 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 432 ; GFX9-NEXT: v_sub_f32_e64 v1, s2, |v1| [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fmed3.ll | 259 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 294 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 312 ; GFX9-NEXT: v_sub_f32_e64 v3, s2, |v3| 377 ; SI-NEXT: v_sub_f32_e64 v2, s2, |v2| 378 ; SI-NEXT: v_sub_f32_e64 v3, s2, |v3| 379 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 413 ; VI-NEXT: v_sub_f32_e64 v4, s2, |v7| 414 ; VI-NEXT: v_sub_f32_e64 v2, s2, |v2| 415 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 432 ; GFX9-NEXT: v_sub_f32_e64 v1, s2, |v1| [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fmed3.ll | 259 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 294 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 312 ; GFX9-NEXT: v_sub_f32_e64 v3, s2, |v3| 377 ; SI-NEXT: v_sub_f32_e64 v2, s2, |v2| 378 ; SI-NEXT: v_sub_f32_e64 v3, s2, |v3| 379 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 413 ; VI-NEXT: v_sub_f32_e64 v4, s2, |v7| 414 ; VI-NEXT: v_sub_f32_e64 v2, s2, |v2| 415 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 432 ; GFX9-NEXT: v_sub_f32_e64 v1, s2, |v1| [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fmed3.ll | 259 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 294 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 312 ; GFX9-NEXT: v_sub_f32_e64 v3, s2, |v3| 377 ; SI-NEXT: v_sub_f32_e64 v2, s2, |v2| 378 ; SI-NEXT: v_sub_f32_e64 v3, s2, |v3| 379 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 413 ; VI-NEXT: v_sub_f32_e64 v4, s2, |v7| 414 ; VI-NEXT: v_sub_f32_e64 v2, s2, |v2| 415 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 432 ; GFX9-NEXT: v_sub_f32_e64 v1, s2, |v1| [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | fmed3.ll | 259 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 294 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 312 ; GFX9-NEXT: v_sub_f32_e64 v3, s2, |v3| 377 ; SI-NEXT: v_sub_f32_e64 v2, s2, |v2| 378 ; SI-NEXT: v_sub_f32_e64 v3, s2, |v3| 379 ; SI-NEXT: v_sub_f32_e64 v4, s2, |v4| 413 ; VI-NEXT: v_sub_f32_e64 v4, s2, |v7| 414 ; VI-NEXT: v_sub_f32_e64 v2, s2, |v2| 415 ; VI-NEXT: v_sub_f32_e64 v3, s2, |v3| 432 ; GFX9-NEXT: v_sub_f32_e64 v1, s2, |v1| [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 93 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 104 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 115 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 93 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 104 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 115 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | strict_fsub.f32.ll | 93 ; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1 104 ; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1| 115 ; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1
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H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | cvt_rpi_i32_f32.ll | 36 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}} 54 ; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
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