/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 7 define double @v_trig_preop_f64(double %a, i32 %b) { 8 ; GCN-LABEL: v_trig_preop_f64: 11 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 14 ; GFX10-LABEL: v_trig_preop_f64: 18 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 28 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 35 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 48 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 59 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 70 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 7 define double @v_trig_preop_f64(double %a, i32 %b) { 8 ; GCN-LABEL: v_trig_preop_f64: 11 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 14 ; GFX10-LABEL: v_trig_preop_f64: 18 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 28 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 35 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 48 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 59 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 70 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 7 define double @v_trig_preop_f64(double %a, i32 %b) { 8 ; GCN-LABEL: v_trig_preop_f64: 11 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 14 ; GFX10-LABEL: v_trig_preop_f64: 18 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 28 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 35 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 48 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 59 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 70 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 7 define double @v_trig_preop_f64(double %a, i32 %b) { 8 ; GCN-LABEL: v_trig_preop_f64: 11 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 14 ; GFX10-LABEL: v_trig_preop_f64: 18 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 28 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 35 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 48 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 59 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 70 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 7 define double @v_trig_preop_f64(double %a, i32 %b) { 8 ; GCN-LABEL: v_trig_preop_f64: 11 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 14 ; GFX10-LABEL: v_trig_preop_f64: 18 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 28 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 35 ; GFX10-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 48 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 59 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 70 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 6 define double @v_trig_preop_f64(double %a, i32 %b) { 7 ; GCN-LABEL: v_trig_preop_f64: 10 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 20 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 33 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 43 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 53 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 66 ; GCN-NEXT: v_trig_preop_f64 v[0:1], s[0:1], 7
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 6 define double @v_trig_preop_f64(double %a, i32 %b) { 7 ; GCN-LABEL: v_trig_preop_f64: 10 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 20 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 33 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 43 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 53 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 66 ; GCN-NEXT: v_trig_preop_f64 v[0:1], s[0:1], 7
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 6 define double @v_trig_preop_f64(double %a, i32 %b) { 7 ; GCN-LABEL: v_trig_preop_f64: 10 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 20 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 33 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 44 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 55 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 69 ; GCN-NEXT: v_trig_preop_f64 v[0:1], s[0:1], 7
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 6 define double @v_trig_preop_f64(double %a, i32 %b) { 7 ; GCN-LABEL: v_trig_preop_f64: 10 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 20 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 33 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 43 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 53 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 66 ; GCN-NEXT: v_trig_preop_f64 v[0:1], s[0:1], 7
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.trig.preop.ll | 6 define double @v_trig_preop_f64(double %a, i32 %b) { 7 ; GCN-LABEL: v_trig_preop_f64: 10 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], v2 20 ; GCN-NEXT: v_trig_preop_f64 v[0:1], v[0:1], 7 33 ; CI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 44 ; VI-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 55 ; GFX9-NEXT: v_trig_preop_f64 v[0:1], s[0:1], v0 69 ; GCN-NEXT: v_trig_preop_f64 v[0:1], s[0:1], 7
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.trig.preop.ll | 9 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] 22 ; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7
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