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/dports/devel/radare2/radare2-5.1.1/libr/util/
H A Dprotobuf.c64 ut64 var64 = 0; in decode_buffer() local
92 st64* i = (st64*) &var64; in decode_buffer()
93 bytes_read = read_u64_leb128 (buffer, end, &var64); in decode_buffer()
94 r_strbuf_appendf (sb, ": %"PFMT64u" | %"PFMT64d"\n", var64, *i); in decode_buffer()
99 ft64* f = (ft64*) &var64; in decode_buffer()
100 st64* i = (st64*) &var64; in decode_buffer()
101 bytes_read = read_u64_leb128 (buffer, end, &var64); in decode_buffer()
107 bytes_read = read_u64_leb128 (buffer, end, &var64); in decode_buffer()
109 const ut8* pe = ps + var64; in decode_buffer()
119 bytes_read += var64; in decode_buffer()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = dso_local global i64 0, align 8
39 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
43 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
53 store volatile i64 %long, i64* @var64, align 8
64 store volatile i64 %ext_bool, i64* @var64
66 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
69 store volatile i64 %ext_char, i64* @var64
71 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
74 store volatile i64 %ext_short, i64* @var64
76 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Darm64-aapcs.ll25 @var64 = global i64 0, align 8
40 ; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]
44 ; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]
54 store volatile i64 %long, i64* @var64, align 8
65 store volatile i64 %ext_bool, i64* @var64
67 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
70 store volatile i64 %ext_char, i64* @var64
72 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
75 store volatile i64 %ext_short, i64* @var64
77 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
[all …]
H A Datomic-ops-lse.ll14 @var64 = global i64 0
60 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
85 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
136 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
161 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
212 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
237 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
288 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
313 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
364 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = dso_local global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
49 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = dso_local global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Delf-globaladdress.ll12 @var64 = dso_local global i64 0
24 %val64 = load i64, i64* @var64
25 store volatile i64 %val64, i64* @var64
33 store i64* @var64, i64** @globaddr
50 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
51 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
55 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64
57 ; Pure address-calculation against var64
58 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64
59 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64

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