vco1_numer (reference) in projects: dports

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Searched refs:vco1_numer (Results 1 – 25 of 62) sorted by relevance

12 3

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	23 u32 vco1_numer; member 52 u32 vco1_numer; member 82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 109 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 260 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 292 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main() 589 per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph() 696 main_cfg->vco1_numer, in cm_full_cfg() 716 per_cfg->vco1_numer, in cm_full_cfg()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	23 u32 vco1_numer; member 52 u32 vco1_numer; member 82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 109 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 260 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 292 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main() 589 per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph() 696 main_cfg->vco1_numer, in cm_full_cfg() 716 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	23 u32 vco1_numer; member 52 u32 vco1_numer; member 82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 109 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 260 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 292 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main() 589 per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph() 696 main_cfg->vco1_numer, in cm_full_cfg() 716 per_cfg->vco1_numer, in cm_full_cfg()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	23 u32 vco1_numer; member 52 u32 vco1_numer; member 82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 109 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 260 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 292 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main() 589 per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph() 696 main_cfg->vco1_numer, in cm_full_cfg() 716 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-socfpga/
H A D	clock_manager_arria10.c	25 u32 vco1_numer; member 54 u32 vco1_numer; member 84 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, 111 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, 259 clk_hz = 1 + main_cfg->vco1_numer; in cm_calc_handoff_main_vco_clk_hz() 291 clk_hz = 1 + per_cfg->vco1_numer; in cm_calc_handoff_periph_vco_clk_hz() 558 main_cfg->vco1_numer, in cm_pll_ramp_main() 592 per_cfg->vco1_numer, in cm_pll_ramp_periph() 704 main_cfg->vco1_numer, in cm_full_cfg() 726 per_cfg->vco1_numer, in cm_full_cfg()

12 3