/dports/lang/gcc6-aux/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc9-devel/gcc-9-20211007/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc8/gcc-8.5.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/aarch64/simd/ |
H A D | vcvt_s64_f64_1.c | 12 int64x1_t b1 = vcvt_s64_f64 (a); in main() 18 int64x1_t b2 = vcvt_s64_f64 (a2); in main()
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/dports/devel/simde/simde-0.7.2/simde/arm/neon/ |
H A D | cvt.h | 213 return vcvt_s64_f64(a); in simde_vcvt_s64_f64() 225 #undef vcvt_s64_f64 226 #define vcvt_s64_f64(a) simde_vcvt_s64_f64(a) macro
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/dports/biology/mmseqs2/MMseqs2-13-45111/lib/simde/simde/arm/neon/ |
H A D | cvt.h | 213 return vcvt_s64_f64(a); in simde_vcvt_s64_f64() 225 #undef vcvt_s64_f64 226 #define vcvt_s64_f64(a) simde_vcvt_s64_f64(a) macro
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/dports/biology/bowtie2/simde-no-tests-f6a0b3b/arm/neon/ |
H A D | cvt.h | 207 return vcvt_s64_f64(a); in simde_vcvt_s64_f64() 225 #undef vcvt_s64_f64 226 #define vcvt_s64_f64(a) simde_vcvt_s64_f64(a) macro
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/test/CodeGen/ |
H A D | aarch64-neon-intrinsics-constrained.c | 855 return vcvt_s64_f64(a); in test_vcvt_s64_f64()
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/dports/devel/llvm11/llvm-11.0.1.src/tools/clang/test/CodeGen/ |
H A D | aarch64-neon-intrinsics-constrained.c | 855 return vcvt_s64_f64(a); in test_vcvt_s64_f64()
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/dports/devel/llvm12/llvm-project-12.0.1.src/clang/test/CodeGen/ |
H A D | aarch64-neon-intrinsics-constrained.c | 855 return vcvt_s64_f64(a); in test_vcvt_s64_f64()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/clang/test/CodeGen/ |
H A D | aarch64-neon-intrinsics-constrained.c | 855 return vcvt_s64_f64(a); in test_vcvt_s64_f64()
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