| /dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc9-devel/gcc-9-20211007/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc8/gcc-8.5.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/ |
| H A D | vcvtph_s64_f16_1.c | 13 #define INSN_NAME vcvtph_s64_f16
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 270 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
271 ret i64 %vcvtph_s64_f16
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 310 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
311 ret i64 %vcvtph_s64_f16
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
| H A D | fp16_intrinsic_scalar_1op.ll | 310 %vcvtph_s64_f16 = tail call i64 @llvm.aarch64.neon.fcvtps.i64.f16(half %a)
311 ret i64 %vcvtph_s64_f16
|