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Searched refs:vhdl_process (Results 1 – 5 of 5) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dprocess.cc41 vhdl_process *vhdl_proc = new vhdl_process(); in generate_vhdl_process()
H A Dlogic.cc181 vhdl_process *proc = new vhdl_process(ivl_logic_basename(log)); in seq_udp_logic()
H A Dvhdl_syntax.hh864 class vhdl_process : public vhdl_conc_stmt, public vhdl_procedural { class
866 explicit vhdl_process(const char *name = "") : name_(name) {} in vhdl_process() function in vhdl_process
886 void add_stmt(vhdl_process *proc);
H A Dvhdl_syntax.cc183 void vhdl_arch::add_stmt(vhdl_process *proc) in add_stmt()
216 void vhdl_process::add_sensitivity(const std::string &name) in add_sensitivity()
221 void vhdl_process::emit(std::ostream &of, int level) const in emit()
H A Dstmt.cc726 static bool draw_synthesisable_wait(vhdl_process *proc, stmt_container *container, in draw_synthesisable_wait()
892 vhdl_process *proc = dynamic_cast<vhdl_process*>(_proc); in draw_wait()