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Searched refs:vhdl_report_stmt (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dvhdl_syntax.cc786 vhdl_report_stmt::vhdl_report_stmt(vhdl_expr *text, in vhdl_report_stmt() function in vhdl_report_stmt
794 void vhdl_report_stmt::emit(ostream& of, int level) const in emit()
807 void vhdl_report_stmt::find_vars(vhdl_var_set_t& read, vhdl_var_set_t&) in find_vars()
813 : vhdl_report_stmt(new vhdl_const_string(reason), SEVERITY_FAILURE) in vhdl_assert_stmt()
821 vhdl_report_stmt::emit(of, level); in emit()
H A Dvhdl_syntax.hh465 class vhdl_report_stmt : public vhdl_seq_stmt { class
467 vhdl_report_stmt(vhdl_expr *text,
469 virtual ~vhdl_report_stmt() {} in ~vhdl_report_stmt()
479 class vhdl_assert_stmt : public vhdl_report_stmt {
H A Dstmt.cc58 new vhdl_report_stmt(new vhdl_const_string("SIMULATION FINISHED"), in draw_stask_finish()
161 container->add_stmt(new vhdl_report_stmt(text)); in draw_stask_display()