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Searched refs:vhdl_signal_decl (Results 1 – 4 of 4) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dscope.cc207 vhdl_scope->add_decl(new vhdl_signal_decl(ss.str(), type)); in draw_nexus()
254 vhdl_scope->add_decl(new vhdl_signal_decl(ss.str(), type)); in draw_nexus()
581 vhdl_decl *decl = new vhdl_signal_decl(name, sig_type); in declare_one_signal()
619 (new vhdl_signal_decl(newname, reg_type)); in declare_one_signal()
710 new vhdl_signal_decl(name + "_Readable", ref->get_type()); in map_signal()
895 vhdl_signal_decl *decl = new vhdl_signal_decl(signame, sigtype); in draw_task()
H A Dlogic.cc120 vhdl_signal_decl *tmp_decl = new vhdl_signal_decl(ss.str(), tmp_type); in comb_udp_logic()
H A Dvhdl_syntax.hh690 class vhdl_signal_decl : public vhdl_decl { class
692 vhdl_signal_decl(const string& name, const vhdl_type* type) in vhdl_signal_decl() function in vhdl_signal_decl
H A Dvhdl_syntax.cc503 void vhdl_signal_decl::emit(std::ostream &of, int level) const in emit()