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Searched refs:visited_cells (Results 1 – 4 of 4) sorted by relevance

/dports/cad/yosys/yosys-yosys-0.12/passes/equiv/
H A Dequiv_make.cc293 pool<Cell*> visited_cells; in find_same_wires() local
305 visited_cells.clear(); in find_same_wires()
306 if (check_signal_in_fanout(visited_cells, old_bit, new_bit)) in find_same_wires()
422 bool check_signal_in_fanout(pool<Cell*> & visited_cells, SigBit source_bit, SigBit target_bit) in check_signal_in_fanout()
437 if (visited_cells.count(driven_cell) > 0) in check_signal_in_fanout()
439 visited_cells.insert(driven_cell); in check_signal_in_fanout()
447 bool is_in_fanout = check_signal_in_fanout(visited_cells, bit, target_bit); in check_signal_in_fanout()
/dports/graphics/blender/blender-2.91.0/source/blender/draw/engines/eevee/
H A Deevee_lightcache.c992 int visited_cells = 0; in compute_cell_id() local
1007 if (visited_cells == cell_idx) { in compute_cell_id()
1011 visited_cells++; in compute_cell_id()
/dports/cad/yosys/yosys-yosys-0.12/passes/opt/
H A Dshare.cc71 pool<RTLIL::Cell*> visited_cells; in find_terminal_bits() local
94 visited_cells.insert(pbit.cell); in find_terminal_bits()
96 if (fwd_ct.cell_known(pbit.cell->type) && visited_cells.count(pbit.cell) == 0) { in find_terminal_bits()
100 visited_cells.insert(pbit.cell); in find_terminal_bits()
/dports/devel/nextpnr/nextpnr-48cd407/ecp5/
H A Dpack.cc1133 std::unordered_set<CellInfo *> visited_cells; in find_nearby_cell() local
1135 visited_cells.insert(origin); in find_nearby_cell()
1154 if (visited_cells.count(port.cell)) in find_nearby_cell()
1158 visited_cells.insert(port.cell); in find_nearby_cell()