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Searched refs:write_reg_sync (Results 1 – 15 of 15) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-udma.c197 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_udma_start()
H A Divtv-driver.c313 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_clear_irq_mask()
319 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_set_irq_mask()
1369 write_reg_sync(0x03, IVTV_REG_DMACONTROL); in ivtv_init_on_first_open()
H A Divtv-irq.c425 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER); in ivtv_dma_enc_start_xfer()
441 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_dma_dec_start_xfer()
H A Divtv-driver.h815 #define write_reg_sync(val, reg) \ macro
H A Divtv-yuv.c930 write_reg_sync(0x01, IVTV_REG_VDM); in ivtv_yuv_init()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-udma.c197 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_udma_start()
H A Divtv-driver.c313 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_clear_irq_mask()
319 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_set_irq_mask()
1369 write_reg_sync(0x03, IVTV_REG_DMACONTROL); in ivtv_init_on_first_open()
H A Divtv-irq.c425 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER); in ivtv_dma_enc_start_xfer()
441 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_dma_dec_start_xfer()
H A Divtv-driver.h815 #define write_reg_sync(val, reg) \ macro
H A Divtv-yuv.c930 write_reg_sync(0x01, IVTV_REG_VDM); in ivtv_yuv_init()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/media/pci/ivtv/
H A Divtv-udma.c197 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_udma_start()
H A Divtv-driver.c313 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_clear_irq_mask()
319 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_set_irq_mask()
1369 write_reg_sync(0x03, IVTV_REG_DMACONTROL); in ivtv_init_on_first_open()
H A Divtv-irq.c425 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER); in ivtv_dma_enc_start_xfer()
441 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER); in ivtv_dma_dec_start_xfer()
H A Divtv-driver.h815 #define write_reg_sync(val, reg) \ macro
H A Divtv-yuv.c930 write_reg_sync(0x01, IVTV_REG_VDM); in ivtv_yuv_init()