/dports/emulators/qemu5/qemu-5.2.0/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 139 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 140 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 157 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 167 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 168 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 169 wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE); in macvm_set_cr4() 222 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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H A D | x86hvf.c | 94 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments() 95 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_BASE, env->idt.base); in hvf_put_segments() 97 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); in hvf_put_segments() 98 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); in hvf_put_segments() 101 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR3, env->cr[3]); in hvf_put_segments() 103 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IA32_EFER, env->efer); in hvf_put_segments() 338 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_int_window_exiting() 346 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val & in vmx_clear_int_window_exiting() 401 wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); in hvf_inject_interrupts() 409 wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); in hvf_inject_interrupts() [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/hvf/ |
H A D | vmx.h | 96 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 104 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 117 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 141 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 142 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 159 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 169 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 170 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 171 wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE); in macvm_set_cr4() 224 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector, selector.sel); 88 wvmcs(cpu->hvf->fd, sf->base, desc->base); 89 wvmcs(cpu->hvf->fd, sf->limit, desc->limit); 90 wvmcs(cpu->hvf->fd, sf->selector, desc->sel); 91 wvmcs(cpu->hvf->fd, sf->ar_bytes, desc->ar);
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/dports/emulators/qemu/qemu-6.2.0/target/i386/hvf/ |
H A D | vmx.h | 96 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 104 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 117 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 141 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 142 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 159 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 169 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 170 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 171 wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE); in macvm_set_cr4() 224 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf->fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf->fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf->fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf->fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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/dports/emulators/qemu60/qemu-6.0.0/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 139 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 140 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 157 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 167 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 168 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 169 wvmcs(vcpu, VMCS_CR4_MASK, CR4_VMXE); in macvm_set_cr4() 222 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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/dports/emulators/qemu-utils/qemu-4.2.1/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 138 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 139 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 152 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 162 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 163 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 180 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip() 212 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | hvf.c | 450 wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); in hvf_reset_vcpu() 461 wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); in hvf_reset_vcpu() 473 wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); in hvf_reset_vcpu() 478 wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); in hvf_reset_vcpu() 483 wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); in hvf_reset_vcpu() 488 wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); in hvf_reset_vcpu() 493 wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); in hvf_reset_vcpu() 503 wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); in hvf_reset_vcpu() 512 wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); in hvf_reset_vcpu() 589 wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, in hvf_init_vcpu() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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H A D | x86hvf.c | 92 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments() 93 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IDTR_BASE, env->idt.base); in hvf_put_segments() 95 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); in hvf_put_segments() 96 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); in hvf_put_segments() 99 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_CR3, env->cr[3]); in hvf_put_segments() 101 wvmcs(cpu_state->hvf_fd, VMCS_GUEST_IA32_EFER, env->efer); in hvf_put_segments() 336 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_int_window_exiting() 344 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val & in vmx_clear_int_window_exiting() 399 wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); in hvf_inject_interrupts() 407 wvmcs(cpu_state->hvf_fd, VMCS_ENTRY_INTR_INFO, info); in hvf_inject_interrupts() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 137 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 138 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 151 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 161 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 162 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 182 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip() 214 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | hvf.c | 450 wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); in hvf_reset_vcpu() 461 wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); in hvf_reset_vcpu() 473 wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); in hvf_reset_vcpu() 478 wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); in hvf_reset_vcpu() 483 wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); in hvf_reset_vcpu() 488 wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); in hvf_reset_vcpu() 493 wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); in hvf_reset_vcpu() 503 wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); in hvf_reset_vcpu() 512 wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); in hvf_reset_vcpu() 589 wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, in hvf_init_vcpu() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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/dports/emulators/qemu42/qemu-4.2.1/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 138 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 139 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 152 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 162 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 163 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 180 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip() 212 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | hvf.c | 450 wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); in hvf_reset_vcpu() 461 wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); in hvf_reset_vcpu() 473 wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); in hvf_reset_vcpu() 478 wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); in hvf_reset_vcpu() 483 wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); in hvf_reset_vcpu() 488 wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); in hvf_reset_vcpu() 493 wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); in hvf_reset_vcpu() 503 wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); in hvf_reset_vcpu() 512 wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); in hvf_reset_vcpu() 589 wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, in hvf_init_vcpu() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 138 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 141 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 160 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 161 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 178 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip() 192 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking() 210 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | hvf.c | 429 wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); in hvf_reset_vcpu() 434 wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); in hvf_reset_vcpu() 446 wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); in hvf_reset_vcpu() 451 wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); in hvf_reset_vcpu() 456 wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); in hvf_reset_vcpu() 461 wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); in hvf_reset_vcpu() 466 wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); in hvf_reset_vcpu() 476 wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); in hvf_reset_vcpu() 485 wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); in hvf_reset_vcpu() 564 wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, in hvf_init_vcpu() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/i386/hvf/ |
H A D | vmx.h | 94 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in enter_long_mode() 102 wvmcs(vcpu, VMCS_GUEST_TR_ACCESS_RIGHTS, in enter_long_mode() 115 wvmcs(vcpu, VMCS_GUEST_IA32_EFER, efer); in exit_long_mode() 137 wvmcs(vcpu, VMCS_CR0_MASK, mask); in macvm_set_cr0() 138 wvmcs(vcpu, VMCS_CR0_SHADOW, cr0); in macvm_set_cr0() 151 wvmcs(vcpu, VMCS_GUEST_CR0, cr0 | CR0_NE | CR0_ET); in macvm_set_cr0() 161 wvmcs(vcpu, VMCS_GUEST_CR4, guest_cr4); in macvm_set_cr4() 162 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4() 179 wvmcs(cpu->hvf_fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip() 211 wvmcs(cpu->hvf_fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting() [all …]
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H A D | hvf.c | 450 wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0); in hvf_reset_vcpu() 461 wvmcs(cpu->hvf_fd, VMCS_CR4_SHADOW, 0x0); in hvf_reset_vcpu() 473 wvmcs(cpu->hvf_fd, VMCS_GUEST_DS_BASE, 0); in hvf_reset_vcpu() 478 wvmcs(cpu->hvf_fd, VMCS_GUEST_ES_BASE, 0); in hvf_reset_vcpu() 483 wvmcs(cpu->hvf_fd, VMCS_GUEST_FS_BASE, 0); in hvf_reset_vcpu() 488 wvmcs(cpu->hvf_fd, VMCS_GUEST_GS_BASE, 0); in hvf_reset_vcpu() 493 wvmcs(cpu->hvf_fd, VMCS_GUEST_SS_BASE, 0); in hvf_reset_vcpu() 503 wvmcs(cpu->hvf_fd, VMCS_GUEST_TR_BASE, 0); in hvf_reset_vcpu() 512 wvmcs(cpu->hvf_fd, VMCS_GUEST_CR3, 0x0); in hvf_reset_vcpu() 589 wvmcs(cpu->hvf_fd, VMCS_PIN_BASED_CTLS, in hvf_init_vcpu() [all …]
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H A D | x86_descr.c | 73 wvmcs(cpu->hvf_fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector() 88 wvmcs(cpu->hvf_fd, sf->base, desc->base); in vmx_write_segment_descriptor() 89 wvmcs(cpu->hvf_fd, sf->limit, desc->limit); in vmx_write_segment_descriptor() 90 wvmcs(cpu->hvf_fd, sf->selector, desc->sel); in vmx_write_segment_descriptor() 91 wvmcs(cpu->hvf_fd, sf->ar_bytes, desc->ar); in vmx_write_segment_descriptor()
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