| /dports/security/afl++/AFLplusplus-3.14c/dictionaries/ |
| H A D | xml_UTF_16BE.dict | 67 "\x00I\x00S\x00O\x00-\x008\x008\x005\x009\x00-\x001"
69 "\x00U\x00T\x00F\x00-\x008"
76 …00.\x00w\x003\x00.\x00o\x00r\x00g\x00/\x00X\x00M\x00L\x00/\x001\x009\x009\x008\x00/\x00n\x00a\x00m…
|
| H A D | xml_UTF_16LE.dict | 67 "I\x00S\x00O\x00-\x008\x008\x005\x009\x00-\x001\x00"
69 "U\x00T\x00F\x00-\x008\x00"
76 …00.\x00w\x003\x00.\x00o\x00r\x00g\x00/\x00X\x00M\x00L\x00/\x001\x009\x009\x008\x00/\x00n\x00a\x00m…
|
| /dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | cortexm7.pp | 31 …VTOR: longword; (*!< Offset: 0x008 (R/W) Vector Table Offset Register …
84 ACTLR: longword; (*!< Offset: 0x008 (R/W) Auxiliary Control Register *)
90 VAL: longword; (*!< Offset: 0x008 (R/W) SysTick Current Value Register *)
133 CPICNT: longword; (*!< Offset: 0x008 (R/W) CPI Count Register *)
189 RNR: longword; (*!< Offset: 0x008 (R/W) MPU Region RNRber Register *)
203 …FPCAR: longword; (*!< Offset: 0x008 (R/W) Floating-Point Context Address Register …
213 DCRDR: longword; (*!< Offset: 0x008 (R/W) Debug Core Register Data Register *)
|
| /dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | cortexm7.pp | 31 …VTOR: longword; (*!< Offset: 0x008 (R/W) Vector Table Offset Register …
84 ACTLR: longword; (*!< Offset: 0x008 (R/W) Auxiliary Control Register *)
90 VAL: longword; (*!< Offset: 0x008 (R/W) SysTick Current Value Register *)
133 CPICNT: longword; (*!< Offset: 0x008 (R/W) CPI Count Register *)
189 RNR: longword; (*!< Offset: 0x008 (R/W) MPU Region RNRber Register *)
203 …FPCAR: longword; (*!< Offset: 0x008 (R/W) Floating-Point Context Address Register …
213 DCRDR: longword; (*!< Offset: 0x008 (R/W) Debug Core Register Data Register *)
|
| /dports/lang/fpc/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | cortexm7.pp | 31 …VTOR: longword; (*!< Offset: 0x008 (R/W) Vector Table Offset Register …
84 ACTLR: longword; (*!< Offset: 0x008 (R/W) Auxiliary Control Register *)
90 VAL: longword; (*!< Offset: 0x008 (R/W) SysTick Current Value Register *)
133 CPICNT: longword; (*!< Offset: 0x008 (R/W) CPI Count Register *)
189 RNR: longword; (*!< Offset: 0x008 (R/W) MPU Region RNRber Register *)
203 …FPCAR: longword; (*!< Offset: 0x008 (R/W) Floating-Point Context Address Register …
213 DCRDR: longword; (*!< Offset: 0x008 (R/W) Debug Core Register Data Register *)
|
| /dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | cortexm7.pp | 31 …VTOR: longword; (*!< Offset: 0x008 (R/W) Vector Table Offset Register …
84 ACTLR: longword; (*!< Offset: 0x008 (R/W) Auxiliary Control Register *)
90 VAL: longword; (*!< Offset: 0x008 (R/W) SysTick Current Value Register *)
133 CPICNT: longword; (*!< Offset: 0x008 (R/W) CPI Count Register *)
189 RNR: longword; (*!< Offset: 0x008 (R/W) MPU Region RNRber Register *)
203 …FPCAR: longword; (*!< Offset: 0x008 (R/W) Floating-Point Context Address Register …
213 DCRDR: longword; (*!< Offset: 0x008 (R/W) Debug Core Register Data Register *)
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/boot/dts/hisilicon/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/boot/dts/hisilicon/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/boot/dts/hisilicon/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/dts/ |
| H A D | hikey960-pinctrl.dtsi | 30 0x008 MUX_M1 /* PMU1_SSI */
187 0x008 MUX_M1 /* SD_DATA0 */
215 0x008 MUX_M1 /* SPI3_CLK */
238 0x008 MUX_M1 /* SDIO_DATA0 */
719 0x008 0x0 /* SPI3_CLK */
772 0x008 0x0 /* SDIO_DATA0 */
826 0x008 0x0 /* SD_DATA0 */
|