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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/interrupts/
H A Dfp_exception.cgs126 test_spr_bits 0x380,7,0x1,fqst2 ; fq2.ftt is set
140 test_spr_bits 0x380,7,0x6,fqst2 ; fq2.ftt is set
154 test_spr_bits 0x380,7,0x6,fqst3 ; fq3.ftt is set
168 test_spr_bits 0x380,7,0x4,fqst3 ; fq3.ftt is set
182 test_spr_bits 0x380,7,0x1,fqst0 ; fq0.ftt is set
196 test_spr_bits 0x380,7,0x1,fqst1 ; fq1.ftt is set
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/interrupts/
H A Dfp_exception.cgs126 test_spr_bits 0x380,7,0x1,fqst2 ; fq2.ftt is set
140 test_spr_bits 0x380,7,0x6,fqst2 ; fq2.ftt is set
154 test_spr_bits 0x380,7,0x6,fqst3 ; fq3.ftt is set
168 test_spr_bits 0x380,7,0x4,fqst3 ; fq3.ftt is set
182 test_spr_bits 0x380,7,0x1,fqst0 ; fq0.ftt is set
196 test_spr_bits 0x380,7,0x1,fqst1 ; fq1.ftt is set
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/frv/interrupts/
H A Dfp_exception.cgs126 test_spr_bits 0x380,7,0x1,fqst2 ; fq2.ftt is set
140 test_spr_bits 0x380,7,0x6,fqst2 ; fq2.ftt is set
154 test_spr_bits 0x380,7,0x6,fqst3 ; fq3.ftt is set
168 test_spr_bits 0x380,7,0x4,fqst3 ; fq3.ftt is set
182 test_spr_bits 0x380,7,0x1,fqst0 ; fq0.ftt is set
196 test_spr_bits 0x380,7,0x1,fqst1 ; fq1.ftt is set
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/frv/interrupts/
H A Dfp_exception.cgs126 test_spr_bits 0x380,7,0x1,fqst2 ; fq2.ftt is set
140 test_spr_bits 0x380,7,0x6,fqst2 ; fq2.ftt is set
154 test_spr_bits 0x380,7,0x6,fqst3 ; fq3.ftt is set
168 test_spr_bits 0x380,7,0x4,fqst3 ; fq3.ftt is set
182 test_spr_bits 0x380,7,0x1,fqst0 ; fq0.ftt is set
196 test_spr_bits 0x380,7,0x1,fqst1 ; fq1.ftt is set
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/
H A Dnfsqrts.cgs30 test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/testsuite/sim/frv/
H A Dnfsqrts.cgs30 test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/frv/
H A Dnfsqrts.cgs30 test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/frv/
H A Dnfsqrts.cgs30 test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
/dports/misc/fq/fq-0.0.2/format/mp4/testdata/
H A Dopus.fqtest226 0x380|00 00 02 |... |
229 0x380| 00 00 00 02 | .... | …
230 0x380| 00 00 03 c0 | .... | …
232 0x380| 00 00 00 01 | .... | …
233 0x380| 00| .| …
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/dts/
H A Delo3-dma-0.dtsi42 reg = <0x380 0x80>;
H A Delo3-dma-1.dtsi42 reg = <0x380 0x80>;

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