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Searched refs:xcore (Results 1 – 25 of 1609) sorted by relevance

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/dports/devel/capstone3/capstone-3.0.5/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/devel/capstone4/capstone-4.0.2/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu42/qemu-4.2.1/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu/qemu-6.2.0/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/devel/py-capstone/capstone-4.0.1/src/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/capstone/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/devel/xelfviewer/XELFViewer-0.03/XCapstone/3rdparty/Capstone/src/arch/XCore/
H A DXCoreInstPrinter.c69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
130 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
142 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
165 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
166 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in set_mem_access()
171 …tail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)MI->flat_insn->det… in set_mem_access()
173 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in set_mem_access()
204 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = reg; in _printOperand()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/XCore/
H A Dresources.ll1 ; RUN: llc -march=xcore < %s | FileCheck %s
3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
20 declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
25 declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
26 declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
[all …]

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