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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/i386/
H A Davx512fp16-vreducesh-1b.c15 case 1: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 1);break; in borrow_reduce_ps()
16 case 2: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 2);break; in borrow_reduce_ps()
17 case 3: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 3);break; in borrow_reduce_ps()
18 case 4: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 4);break; in borrow_reduce_ps()
19 case 5: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 5);break; in borrow_reduce_ps()
20 case 6: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 6);break; in borrow_reduce_ps()
21 case 7: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 7);break; in borrow_reduce_ps()
22 case 8: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 8);break; in borrow_reduce_ps()
H A Davx512fp16-vreduceph-1b.c17 case 1: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 1);break; in borrow_reduce_ps()
18 case 2: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 2);break; in borrow_reduce_ps()
19 case 3: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 3);break; in borrow_reduce_ps()
20 case 4: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 4);break; in borrow_reduce_ps()
21 case 5: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 5);break; in borrow_reduce_ps()
22 case 6: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 6);break; in borrow_reduce_ps()
23 case 7: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 7);break; in borrow_reduce_ps()
24 case 8: temp.zmm = _mm512_mask_reduce_ps (v.zmm, 0xffff, v.zmm, 8);break; in borrow_reduce_ps()
H A Davx512f-pr84786-3.c14 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in foo()
19 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in foo()
25 #define A(n) asm volatile ("" : : "v" (zmm##n)); in foo()
35 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in bar()
38 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in bar()
44 #define A(n) asm volatile ("" : : "v" (zmm##n)); in bar()
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/X86/
H A Davx-vzeroupper.ll47 ; FAST-ymm-zmm-LABEL: test01:
48 ; FAST-ymm-zmm: # %bb.0:
58 ; FAST-ymm-zmm-NEXT: retq
103 ; FAST-ymm-zmm-LABEL: test02:
104 ; FAST-ymm-zmm: # %bb.0:
157 ; FAST-ymm-zmm-LABEL: test03:
166 ; FAST-ymm-zmm-NEXT: callq foo
184 ; FAST-ymm-zmm-NEXT: retq
282 ; FAST-ymm-zmm-LABEL: test04:
283 ; FAST-ymm-zmm: # %bb.0:
[all …]
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
H A Dstack-folding-int-avx512.ll13 …;CHECK: valignd $1, {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byt…
42 …;CHECK: valignq $1, {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byt…
71 …;CHECK: vpavgb {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte…
80 …;CHECK: vpavgb {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte…
132 …;CHECK: vpavgw {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte…
141 …;CHECK: vpavgw {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte…
446 …;CHECK: vpaddb {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte…
1184 …;CHECK: vpermb {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte Fol…
1215 …;CHECK: vpermd {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte Fol…
1292 …;CHECK: vpermq {{-?[0-9]*}}(%rsp), {{%zmm[0-9][0-9]*}}, {{%zmm[0-9][0-9]*}} {{.*#+}} 64-byte Fol…
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/
H A Davx-vzeroupper.ll47 ; FAST-ymm-zmm-LABEL: test01:
48 ; FAST-ymm-zmm: # %bb.0:
58 ; FAST-ymm-zmm-NEXT: retq
103 ; FAST-ymm-zmm-LABEL: test02:
104 ; FAST-ymm-zmm: # %bb.0:
157 ; FAST-ymm-zmm-LABEL: test03:
166 ; FAST-ymm-zmm-NEXT: callq foo
184 ; FAST-ymm-zmm-NEXT: retq
282 ; FAST-ymm-zmm-LABEL: test04:
283 ; FAST-ymm-zmm: # %bb.0:
[all …]
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/
H A Davx-vzeroupper.ll46 ; FAST-ymm-zmm-LABEL: test01:
47 ; FAST-ymm-zmm: # %bb.0:
51 ; FAST-ymm-zmm-NEXT: callq do_sse
53 ; FAST-ymm-zmm-NEXT: callq do_sse
57 ; FAST-ymm-zmm-NEXT: retq
135 ; FAST-ymm-zmm-LABEL: test03:
137 ; FAST-ymm-zmm-NEXT: pushq %rbx
144 ; FAST-ymm-zmm-NEXT: callq foo
158 ; FAST-ymm-zmm-NEXT: decl %ebx
162 ; FAST-ymm-zmm-NEXT: popq %rbx
[all …]
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dgep-expanded-vector.ll14 ; CHECK: vpbroadcastq .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
15 ; CHECK-NEXT: vpaddq [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
16 ; CHECK-NEXT: vpaddq [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
17 ; CHECK-NEXT: vpaddq [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
18 ; CHECK-NEXT: vpaddq [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
19 ; CHECK-NEXT: vpaddq [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
20 ; CHECK-NEXT: vpaddq [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
22 ; CHECK-NEXT: vpaddq [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
/dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/i386/
H A Davx512f-pr84786-3.c14 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in foo()
19 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in foo()
25 #define A(n) asm volatile ("" : : "v" (zmm##n)); in foo()
35 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in bar()
38 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in bar()
44 #define A(n) asm volatile ("" : : "v" (zmm##n)); in bar()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/i386/
H A Davx512f-pr84786-3.c14 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in foo()
19 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in foo()
25 #define A(n) asm volatile ("" : : "v" (zmm##n)); in foo()
35 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in bar()
38 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in bar()
44 #define A(n) asm volatile ("" : : "v" (zmm##n)); in bar()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/i386/
H A Davx512f-pr84786-3.c14 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in foo()
19 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in foo()
25 #define A(n) asm volatile ("" : : "v" (zmm##n)); in foo()
35 #define A(n) register __m512i zmm##n __asm ("zmm" #n); in bar()
38 #define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); in bar()
44 #define A(n) asm volatile ("" : : "v" (zmm##n)); in bar()

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