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Searched refs:ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h4924 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT 0x6 macro
H A Dgmc_8_2_sh_mask.h5886 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT 0x6 macro
H A Dgmc_7_1_sh_mask.h5562 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT 0x6 macro
H A Dgmc_8_1_sh_mask.h6008 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT 0x6 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7672 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro
H A Dmmhub_9_1_sh_mask.h7335 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h7760 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h6500 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro
H A Dgc_9_1_sh_mask.h6414 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h6235 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE__SHIFT … macro