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Searched refs:AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h12167 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_10_0_sh_mask.h13425 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_11_0_sh_mask.h13431 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_11_2_sh_mask.h14047 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK 0xffffffff macro
H A Ddce_12_0_sh_mask.h7010 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h8145 #define AZALIA_CRC1_CONTROL1__CRC_BLOCK_SIZE_MASK … macro