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Searched refs:AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h13298 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h13304 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h13920 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h7056 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h8191 #define AZALIA_MEM_PWR_STATUS__AZ_MEM_PWR_STATE__SHIFT … macro