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Searched refs:BGE_MAC_MODE (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/netif/bge/
H A Dif_bge.c829 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & in bge_miibus_statchg()
841 CSR_WRITE_4(sc, BGE_MAC_MODE, mac_mode); in bge_miibus_statchg()
1859 CSR_WRITE_4(sc, BGE_MAC_MODE, val); in bge_blockinit()
2761 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & mac_mode_mask; in bge_reset()
2962 val = CSR_READ_4(sc, BGE_MAC_MODE); in bge_reset()
2964 CSR_WRITE_4(sc, BGE_MAC_MODE, val); in bge_reset()
3925 BGE_CLRBIT(sc, BGE_MAC_MODE, in bge_ifmedia_upd()
3928 BGE_SETBIT(sc, BGE_MAC_MODE, in bge_ifmedia_upd()
3993 if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX) in bge_ifmedia_sts()
4603 BGE_CLRBIT(sc, BGE_MAC_MODE, in bge_tbi_link_upd()
H A Dif_bgereg.h608 #define BGE_MAC_MODE 0x0400 macro
/dragonfly/sys/dev/netif/bnx/
H A Dif_bnx.c617 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & in bnx_miibus_statchg()
629 CSR_WRITE_4(sc, BGE_MAC_MODE, mac_mode); in bnx_miibus_statchg()
1617 CSR_WRITE_4(sc, BGE_MAC_MODE, val); in bnx_blockinit()
2580 mac_mode = CSR_READ_4(sc, BGE_MAC_MODE) & mac_mode_mask; in bnx_reset()
2709 val = CSR_READ_4(sc, BGE_MAC_MODE); in bnx_reset()
2711 CSR_WRITE_4(sc, BGE_MAC_MODE, val); in bnx_reset()
3760 BNX_CLRBIT(sc, BGE_MAC_MODE, in bnx_ifmedia_upd()
3763 BNX_SETBIT(sc, BGE_MAC_MODE, in bnx_ifmedia_upd()
3825 if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX) in bnx_ifmedia_sts()
4400 BNX_CLRBIT(sc, BGE_MAC_MODE, in bnx_tbi_link_upd()