Home
last modified time | relevance | path

Searched refs:CGTS_CU12_SP0_CTRL_REG__SP01_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h10461 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
H A Dgfx_8_0_sh_mask.h12185 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
H A Dgfx_8_1_sh_mask.h12583 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h25010 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK … macro
H A Dgc_9_1_sh_mask.h26426 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK … macro
H A Dgc_9_2_1_sh_mask.h26557 #define CGTS_CU12_SP0_CTRL_REG__SP01_MASK … macro